Re: [Qemu-devel] [PATCH] Incorrect Stack Pointer shadow register support on some m68k CPUs

[Laurent Vivier]

On 27/05/2019 05:43, Lucien Anti-Spam wrote:
>  > On Sunday, May 26, 2019, 10:10:39 PM GMT+9, Laurent Vivier 
> <address@hidden> wrote:
>  > On 26/05/2019 09:28, Lucien Murray-Pitts wrote:
>  >> On CPU32 and the early 68000 and 68010 the ISP doesnt exist.
>  >> These CPUs only have SSP/USP.
>  >>
> [SNIP]
>  >> The movec instruction when accessing these shadow registers
>  >> in some configurations should issue a TRAP.  This patch does not
>  >> add this funcitonality to the helpers.
>  >>
>
>  >I think it's better to also update movec in the same patch.
> [LMP] Movec should be undefined (coldfire manual) for registers it 
> doesnt know.  The MC680X0 manual is less clear.
> Technically this could be just leaving the operation of the instruction 
> alone and allowing it to pass back MSP/ISP/USP as it currently does.  My 
> thinking is this is less likely to break anything

In fact, code in m68k_movec_from()/m68k_movec_to() need rework because 
they trigger a cpu_abort() with unknown code, they need rework too. So I 
think we can just do as you propose for the moment.

Thanks,
Laurent