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[PATCH v2] linux-user: Add /proc/cpuinfo handler for RISC-V
From: |
Andreas Schwab |
Subject: |
[PATCH v2] linux-user: Add /proc/cpuinfo handler for RISC-V |
Date: |
Wed, 03 May 2023 13:20:09 +0200 |
User-agent: |
Gnus/5.13 (Gnus v5.13) |
Signed-off-by: Andreas Schwab <schwab@suse.de>
---
v2: dynmically compute the isa string
linux-user/syscall.c | 55 ++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 69f740ff98..6df138c8b6 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -8231,7 +8231,8 @@ void target_exception_dump(CPUArchState *env, const char
*fmt, int code)
}
#if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN || \
- defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA)
+ defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) || \
+ defined(TARGET_RISCV)
static int is_proc(const char *filename, const char *entry)
{
return strcmp(filename, entry) == 0;
@@ -8309,6 +8310,56 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd)
}
#endif
+#if defined(TARGET_RISCV)
+static int open_cpuinfo(CPUArchState *cpu_env, int fd)
+{
+ int i, num_cpus;
+ char isa[32];
+
+#if defined(TARGET_RISCV32)
+ strcpy (isa, "rv32");
+#endif
+#if defined(TARGET_RISCV64)
+ strcpy (isa, "rv64");
+#endif
+ i = strlen (isa);
+ if (riscv_has_ext (cpu_env, RVI))
+ isa[i++] = 'i';
+ if (riscv_has_ext (cpu_env, RVE))
+ isa[i++] = 'e';
+ if (riscv_has_ext (cpu_env, RVM))
+ isa[i++] = 'm';
+ if (riscv_has_ext (cpu_env, RVA))
+ isa[i++] = 'a';
+ if (riscv_has_ext (cpu_env, RVF))
+ isa[i++] = 'f';
+ if (riscv_has_ext (cpu_env, RVD))
+ isa[i++] = 'd';
+ if (riscv_has_ext (cpu_env, RVV))
+ isa[i++] = 'v';
+ if (riscv_has_ext (cpu_env, RVC))
+ isa[i++] = 'c';
+ isa[i] = 0;
+
+ num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
+ for (i = 0; i < num_cpus; i++) {
+ dprintf(fd, "processor\t: %d\n", i);
+ dprintf(fd, "hart\t\t: %d\n", i);
+ dprintf(fd, "isa\t\t: %s\n", isa);
+#if defined(TARGET_RISCV32)
+ dprintf(fd, "mmu\t\t: sv32\n");
+#endif
+#if defined(TARGET_RISCV64)
+ dprintf(fd, "mmu\t\t: sv57\n");
+#endif
+ dprintf(fd, "mvendorid\t: 0x0\n");
+ dprintf(fd, "marchid\t\t: 0x0\n");
+ dprintf(fd, "mimpid\t\t: 0x0\n\n");
+ }
+ return 0;
+}
+#endif
+
#if defined(TARGET_M68K)
static int open_hardware(CPUArchState *cpu_env, int fd)
{
@@ -8333,7 +8384,7 @@ static int do_openat(CPUArchState *cpu_env, int dirfd,
const char *pathname, int
#if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN
{ "/proc/net/route", open_net_route, is_proc },
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_HPPA)
+#if defined(TARGET_SPARC) || defined(TARGET_HPPA) || defined(TARGET_RISCV)
{ "/proc/cpuinfo", open_cpuinfo, is_proc },
#endif
#if defined(TARGET_M68K)
--
2.40.1
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
- [PATCH v2] linux-user: Add /proc/cpuinfo handler for RISC-V,
Andreas Schwab <=