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[PULL 22/80] tcg/sparc64: Allocate %g2 as a third temporary
From: |
Richard Henderson |
Subject: |
[PULL 22/80] tcg/sparc64: Allocate %g2 as a third temporary |
Date: |
Tue, 16 May 2023 12:40:47 -0700 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/sparc64/tcg-target.c.inc | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index e997db2645..64464ab363 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -83,9 +83,10 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
#define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 32)
#define ALL_QLDST_REGS (ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
-/* Define some temporary registers. T2 is used for constant generation. */
+/* Define some temporary registers. T3 is used for constant generation. */
#define TCG_REG_T1 TCG_REG_G1
-#define TCG_REG_T2 TCG_REG_O7
+#define TCG_REG_T2 TCG_REG_G2
+#define TCG_REG_T3 TCG_REG_O7
#ifndef CONFIG_SOFTMMU
# define TCG_GUEST_BASE_REG TCG_REG_I5
@@ -110,7 +111,6 @@ static const int tcg_target_reg_alloc_order[] = {
TCG_REG_I4,
TCG_REG_I5,
- TCG_REG_G2,
TCG_REG_G3,
TCG_REG_G4,
TCG_REG_G5,
@@ -492,8 +492,8 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type,
TCGReg ret,
static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg ret, tcg_target_long arg)
{
- tcg_debug_assert(ret != TCG_REG_T2);
- tcg_out_movi_int(s, type, ret, arg, false, TCG_REG_T2);
+ tcg_debug_assert(ret != TCG_REG_T3);
+ tcg_out_movi_int(s, type, ret, arg, false, TCG_REG_T3);
}
static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rs)
@@ -885,10 +885,8 @@ static void tcg_out_jmpl_const(TCGContext *s, const
tcg_insn_unit *dest,
{
uintptr_t desti = (uintptr_t)dest;
- /* Be careful not to clobber %o7 for a tail call. */
tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_REG_T1,
- desti & ~0xfff, in_prologue,
- tail_call ? TCG_REG_G2 : TCG_REG_O7);
+ desti & ~0xfff, in_prologue, TCG_REG_T2);
tcg_out_arithi(s, tail_call ? TCG_REG_G0 : TCG_REG_O7,
TCG_REG_T1, desti & 0xfff, JMPL);
}
@@ -1856,6 +1854,7 @@ static void tcg_target_init(TCGContext *s)
tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); /* stack pointer */
tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */
tcg_regset_set_reg(s->reserved_regs, TCG_REG_T2); /* for internal use */
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_T3); /* for internal use */
}
#define ELF_HOST_MACHINE EM_SPARCV9
--
2.34.1
- [PULL 13/80] tcg/i386: Use full load/store helpers in user-only mode, (continued)
- [PULL 13/80] tcg/i386: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 14/80] tcg/aarch64: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 12/80] tcg/aarch64: Detect have_lse, have_lse2 for darwin, Richard Henderson, 2023/05/16
- [PULL 17/80] tcg/riscv: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 15/80] tcg/ppc: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 16/80] tcg/loongarch64: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 18/80] tcg/arm: Adjust constraints on qemu_ld/st, Richard Henderson, 2023/05/16
- [PULL 19/80] tcg/arm: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 20/80] tcg/mips: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 21/80] tcg/s390x: Use full load/store helpers in user-only mode, Richard Henderson, 2023/05/16
- [PULL 22/80] tcg/sparc64: Allocate %g2 as a third temporary,
Richard Henderson <=
- [PULL 23/80] tcg/sparc64: Rename tcg_out_movi_imm13 to tcg_out_movi_s13, Richard Henderson, 2023/05/16
- [PULL 25/80] tcg/sparc64: Rename tcg_out_movi_imm32 to tcg_out_movi_u32, Richard Henderson, 2023/05/16
- [PULL 26/80] tcg/sparc64: Split out tcg_out_movi_s32, Richard Henderson, 2023/05/16
- [PULL 24/80] target/sparc64: Remove tcg_out_movi_s13 case from tcg_out_movi_imm32, Richard Henderson, 2023/05/16
- [PULL 28/80] accel/tcg: Remove helper_unaligned_{ld,st}, Richard Henderson, 2023/05/16
- [PULL 27/80] tcg/sparc64: Use standard slow path for softmmu, Richard Henderson, 2023/05/16
- [PULL 29/80] tcg/loongarch64: Check the host supports unaligned accesses, Richard Henderson, 2023/05/16
- [PULL 30/80] tcg/loongarch64: Support softmmu unaligned accesses, Richard Henderson, 2023/05/16
- [PULL 31/80] tcg/riscv: Support softmmu unaligned accesses, Richard Henderson, 2023/05/16
- [PULL 32/80] tcg: Introduce tcg_target_has_memory_bswap, Richard Henderson, 2023/05/16