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From: | Palmer Dabbelt |
Subject: | Re: [PATCH 1/2] riscv: zicond: make non-experimental |
Date: | Tue, 08 Aug 2023 13:52:08 -0700 (PDT) |
On Tue, 08 Aug 2023 11:45:49 PDT (-0700), Vineet Gupta wrote:
On 8/8/23 11:29, Richard Henderson wrote:On 8/8/23 11:17, Vineet Gupta wrote:zicond is now codegen supported in both llvm and gcc.It is still not in https://wiki.riscv.org/display/HOME/Recently+Ratified+ExtensionsRight, its been frozen since April though and with support trickling in rest of tooling it becomes harder to test. I don't know what exactly QEMU's policy is on this ?
IIUC we'd historically marked stuff as non-experimental when it's frozen, largely because ratification is such a nebulous process. There's obviously risk there, but there's risk to anything. Last I can find is 260b594d8a ("RISC-V: Add Zawrs ISA extension support"), which specifically calls out Zawrs as frozen and IIUC adds support without the "x-" prefix.
I can't find anything written down about it, though...
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