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[PULL v2 27/45] hw/intc: Make rtc variable names consistent
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From: |
Alistair Francis |
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Subject: |
[PULL v2 27/45] hw/intc: Make rtc variable names consistent |
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Date: |
Mon, 11 Sep 2023 16:43:02 +1000 |
From: Jason Chien <jason.chien@sifive.com>
The variables whose values are given by cpu_riscv_read_rtc() should be named
"rtc". The variables whose value are given by cpu_riscv_read_rtc_raw()
should be named "rtc_r".
Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230728082502.26439-2-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/intc/riscv_aclint.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c
index bf77e29a70..25cf7a5d9d 100644
--- a/hw/intc/riscv_aclint.c
+++ b/hw/intc/riscv_aclint.c
@@ -64,13 +64,13 @@ static void
riscv_aclint_mtimer_write_timecmp(RISCVAclintMTimerState *mtimer,
uint64_t next;
uint64_t diff;
- uint64_t rtc_r = cpu_riscv_read_rtc(mtimer);
+ uint64_t rtc = cpu_riscv_read_rtc(mtimer);
/* Compute the relative hartid w.r.t the socket */
hartid = hartid - mtimer->hartid_base;
mtimer->timecmp[hartid] = value;
- if (mtimer->timecmp[hartid] <= rtc_r) {
+ if (mtimer->timecmp[hartid] <= rtc) {
/*
* If we're setting an MTIMECMP value in the "past",
* immediately raise the timer interrupt
@@ -81,7 +81,7 @@ static void
riscv_aclint_mtimer_write_timecmp(RISCVAclintMTimerState *mtimer,
/* otherwise, set up the future timer interrupt */
qemu_irq_lower(mtimer->timer_irqs[hartid]);
- diff = mtimer->timecmp[hartid] - rtc_r;
+ diff = mtimer->timecmp[hartid] - rtc;
/* back to ns (note args switched in muldiv64) */
uint64_t ns_diff = muldiv64(diff, NANOSECONDS_PER_SECOND, timebase_freq);
--
2.41.0
- [PULL v2 12/45] target/riscv: Move vector translation checks, (continued)
- [PULL v2 12/45] target/riscv: Move vector translation checks, Alistair Francis, 2023/09/11
- [PULL v2 13/45] target/riscv: Refactor translation of vector-widening instruction, Alistair Francis, 2023/09/11
- [PULL v2 14/45] target/riscv: Refactor some of the generic vector functionality, Alistair Francis, 2023/09/11
- [PULL v2 15/45] target/riscv: Add Zvbb ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 16/45] target/riscv: Add Zvkned ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 17/45] target/riscv: Add Zvknh ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 18/45] target/riscv: Add Zvksh ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 19/45] target/riscv: Add Zvkg ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 20/45] crypto: Create sm4_subword, Alistair Francis, 2023/09/11
- [PULL v2 21/45] crypto: Add SM4 constant parameter CK, Alistair Francis, 2023/09/11
- [PULL v2 27/45] hw/intc: Make rtc variable names consistent,
Alistair Francis <=
- [PULL v2 29/45] target/riscv: support the AIA device emulation with KVM enabled, Alistair Francis, 2023/09/11
- [PULL v2 22/45] target/riscv: Add Zvksed ISA extension support, Alistair Francis, 2023/09/11
- [PULL v2 25/45] target/riscv: Fix zfa fleq.d and fltq.d, Alistair Francis, 2023/09/11
- [PULL v2 26/45] hw/intc: Fix upper/lower mtime write calculation, Alistair Francis, 2023/09/11
- [PULL v2 23/45] target/riscv: Implement WARL behaviour for mcountinhibit/mcounteren, Alistair Francis, 2023/09/11
- [PULL v2 28/45] linux-user/riscv: Use abi type for target_ucontext, Alistair Francis, 2023/09/11
- [PULL v2 31/45] target/riscv: Create an KVM AIA irqchip, Alistair Francis, 2023/09/11
- [PULL v2 32/45] target/riscv: update APLIC and IMSIC to support KVM AIA, Alistair Francis, 2023/09/11
- [PULL v2 33/45] target/riscv: select KVM AIA in riscv virt machine, Alistair Francis, 2023/09/11
- [PULL v2 35/45] target/riscv: Update CSR bits name for svadu extension, Alistair Francis, 2023/09/11