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[PULL 15/85] target/hppa: Fix bb_sar for hppa64
From: |
Richard Henderson |
Subject: |
[PULL 15/85] target/hppa: Fix bb_sar for hppa64 |
Date: |
Mon, 6 Nov 2023 19:02:57 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index b0cd12a2d0..ffa367b91f 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3073,14 +3073,21 @@ static bool trans_bb_sar(DisasContext *ctx, arg_bb_sar
*a)
{
TCGv_reg tmp, tcg_r;
DisasCond cond;
+ bool d = false;
nullify_over(ctx);
tmp = tcg_temp_new();
tcg_r = load_gpr(ctx, a->r);
- tcg_gen_shl_reg(tmp, tcg_r, cpu_sar);
+ if (cond_need_ext(ctx, d)) {
+ /* Force shift into [32,63] */
+ tcg_gen_ori_reg(tmp, cpu_sar, 32);
+ tcg_gen_shl_reg(tmp, tcg_r, tmp);
+ } else {
+ tcg_gen_shl_reg(tmp, tcg_r, cpu_sar);
+ }
- cond = cond_make_0(a->c ? TCG_COND_GE : TCG_COND_LT, tmp);
+ cond = cond_make_0_tmp(a->c ? TCG_COND_GE : TCG_COND_LT, tmp);
return do_cbranch(ctx, a->disp, a->n, &cond);
}
@@ -3088,12 +3095,15 @@ static bool trans_bb_imm(DisasContext *ctx, arg_bb_imm
*a)
{
TCGv_reg tmp, tcg_r;
DisasCond cond;
+ bool d = false;
+ int p;
nullify_over(ctx);
tmp = tcg_temp_new();
tcg_r = load_gpr(ctx, a->r);
- tcg_gen_shli_reg(tmp, tcg_r, a->p);
+ p = a->p | (cond_need_ext(ctx, d) ? 32 : 0);
+ tcg_gen_shli_reg(tmp, tcg_r, p);
cond = cond_make_0(a->c ? TCG_COND_GE : TCG_COND_LT, tmp);
return do_cbranch(ctx, a->disp, a->n, &cond);
--
2.34.1
- [PULL 02/85] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry, (continued)
- [PULL 02/85] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry, Richard Henderson, 2023/11/06
- [PULL 05/85] target/hppa: Split out hppa_flush_tlb_range, Richard Henderson, 2023/11/06
- [PULL 01/85] target/hppa: Include PSW_P in tb flags and mmu index, Richard Henderson, 2023/11/06
- [PULL 03/85] target/hppa: Use IntervalTreeNode in HPPATLBEntry, Richard Henderson, 2023/11/06
- [PULL 12/85] target/hppa: Truncate rotate count in trans_shrpw_sar, Richard Henderson, 2023/11/06
- [PULL 14/85] target/hppa: Fix do_add, do_sub for hppa64, Richard Henderson, 2023/11/06
- [PULL 04/85] target/hppa: Always report one page to tlb_set_page, Richard Henderson, 2023/11/06
- [PULL 08/85] target/hppa: Remove get_temp_tl, Richard Henderson, 2023/11/06
- [PULL 13/85] target/hppa: Fix trans_ds for hppa64, Richard Henderson, 2023/11/06
- [PULL 10/85] target/hppa: Fix hppa64 case in machine.c, Richard Henderson, 2023/11/06
- [PULL 15/85] target/hppa: Fix bb_sar for hppa64,
Richard Henderson <=
- [PULL 18/85] target/hppa: Make HPPA_BTLB_ENTRIES variable, Richard Henderson, 2023/11/06
- [PULL 11/85] target/hppa: Fix load in do_load_32, Richard Henderson, 2023/11/06
- [PULL 30/85] target/hppa: Pass d to do_cond, Richard Henderson, 2023/11/06
- [PULL 22/85] target/hppa: Handle absolute addresses for pa2.0, Richard Henderson, 2023/11/06
- [PULL 37/85] target/hppa: Remove TARGET_HPPA64, Richard Henderson, 2023/11/06
- [PULL 38/85] target/hppa: Decode d for logical instructions, Richard Henderson, 2023/11/06
- [PULL 16/85] target/hppa: Fix extrw and depw with sar for hppa64, Richard Henderson, 2023/11/06
- [PULL 17/85] target/hppa: Introduce TYPE_HPPA64_CPU, Richard Henderson, 2023/11/06
- [PULL 06/85] target/hppa: Populate an interval tree with valid tlb entries, Richard Henderson, 2023/11/06
- [PULL 26/85] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb], Richard Henderson, 2023/11/06