[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 35/43] target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU
From: |
Peter Maydell |
Subject: |
[PULL 35/43] target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU argument |
Date: |
Tue, 19 Dec 2023 19:12:59 +0000 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs
take a ARMCPU* argument. Use the CPU() QOM cast macro When
calling the generic vCPU API from "sysemu/kvm.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-id: 20231123183518.64569-15-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/kvm.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index e4cd21caefc..075487e62f1 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -1302,17 +1302,16 @@ static void kvm_arm_vm_state_change(void *opaque, bool
running, RunState state)
/**
* kvm_arm_handle_dabt_nisv:
- * @cs: CPUState
+ * @cpu: ARMCPU
* @esr_iss: ISS encoding (limited) for the exception from Data Abort
* ISV bit set to '0b0' -> no valid instruction syndrome
* @fault_ipa: faulting address for the synchronous data abort
*
* Returns: 0 if the exception has been handled, < 0 otherwise
*/
-static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
+static int kvm_arm_handle_dabt_nisv(ARMCPU *cpu, uint64_t esr_iss,
uint64_t fault_ipa)
{
- ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
/*
* Request KVM to inject the external data abort into the guest
@@ -1328,7 +1327,7 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs,
uint64_t esr_iss,
*/
events.exception.ext_dabt_pending = 1;
/* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
- if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
+ if (!kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events)) {
env->ext_dabt_raised = 1;
return 0;
}
@@ -1420,6 +1419,7 @@ static bool kvm_arm_handle_debug(CPUState *cs,
int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
{
+ ARMCPU *cpu = ARM_CPU(cs);
int ret = 0;
switch (run->exit_reason) {
@@ -1430,7 +1430,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run
*run)
break;
case KVM_EXIT_ARM_NISV:
/* External DABT with no valid iss to decode */
- ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
+ ret = kvm_arm_handle_dabt_nisv(cpu, run->arm_nisv.esr_iss,
run->arm_nisv.fault_ipa);
break;
default:
--
2.34.1
- [PULL 32/43] target/arm/kvm: Have kvm_arm_vcpu_finalize take a ARMCPU argument, (continued)
- [PULL 32/43] target/arm/kvm: Have kvm_arm_vcpu_finalize take a ARMCPU argument, Peter Maydell, 2023/12/19
- [PULL 34/43] target/arm/kvm: Have kvm_arm_verify_ext_dabt_pending take a ARMCPU arg, Peter Maydell, 2023/12/19
- [PULL 22/43] hw/intc/arm_gicv3: Include missing 'qemu/error-report.h' header, Peter Maydell, 2023/12/19
- [PULL 38/43] target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 only, Peter Maydell, 2023/12/19
- [PULL 39/43] target/arm: Restrict TCG specific helpers, Peter Maydell, 2023/12/19
- [PULL 40/43] target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel, Peter Maydell, 2023/12/19
- [PULL 42/43] target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.N, Peter Maydell, 2023/12/19
- [PULL 26/43] target/arm/kvm: Have kvm_arm_sve_get_vls take a ARMCPU argument, Peter Maydell, 2023/12/19
- [PULL 30/43] target/arm/kvm: Have kvm_arm_pmu_set_irq take a ARMCPU argument, Peter Maydell, 2023/12/19
- [PULL 29/43] target/arm/kvm: Have kvm_arm_pmu_init take a ARMCPU argument, Peter Maydell, 2023/12/19
- [PULL 35/43] target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU argument,
Peter Maydell <=
- [PULL 41/43] target/arm/tcg: Including missing 'exec/exec-all.h' header, Peter Maydell, 2023/12/19
- [PULL 43/43] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards, Peter Maydell, 2023/12/19
- [PULL 25/43] target/arm/kvm: Have kvm_arm_sve_set_vls take a ARMCPU argument, Peter Maydell, 2023/12/19
- Re: [PULL 00/43] target-arm queue, Stefan Hajnoczi, 2023/12/20