Re: Makefile missing semicolon

[Bernd Jendrissek]

On 7/25/07, Hynek Cihlar <address@hidden> wrote:
> .c.o:
> #       if $(COMPILE) -MT $@ -MD -MP -MF "$(DEPDIR)/$*.Tpo" -c -o $@ $<; \
> #       then mv -f "$(DEPDIR)/$*.Tpo" "$(DEPDIR)/$*.Po"; else rm -f 
> $(DEPDIR)/$*.Tpo"; exit 1; fi
>         source='$<' object='$@' libtool=no \
>         DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
>         $(COMPILE) -c $<
>
> Shouldn't be the shell commands separated by semicolon?

There is only one shell command, but it happens to be broken across a
few lines (indicated by the backslashes) which make glues together
again before it passes the result to the shell.

In this case, the command getting run is (or should be):

source='$<' object='$@' libtool=no DEPDIR=$(DEPDIR) $(CCDEPMODE)
$(depcomp) $(COMPILE) -c $<