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Re: How do I avoid this infinite loop?

From: Ralf Wildenhues
Subject: Re: How do I avoid this infinite loop?
Date: Tue, 4 Nov 2008 22:39:24 +0100
User-agent: Mutt/1.5.18 (2008-05-17)

Hello Jules,

* Jules Colding wrote on Tue, Nov 04, 2008 at 08:46:54AM CET:
> I have a little project in where I use a third party project. My  
> "" has a rule to update and build the third party project but 
> this rule enters an unconditional infinite loop. Right now I'm getting 
> the source for the external project from svn. I would like my  
> to do this:
> I pasted the "" in below. The problem is that make repeats  
> the "$(TAO_FILES):" target infinitely. How to I make it execute the "$ 
> (TAO_FILES):" target exactly once?

First, are you really sure it runs indefinitely?  Maybe it just runs
once for each file in $(TAO_FILES).

If that is the case, then here's the deal explained:

In short, you can probably use something like:

$(TAO_FILES): make-tao-files

make-tao-files: $(ACE_ROOT)
        ... commands that make $(TAO_FILES)
        touch $@

Whether 'make-tao-files' should be distributed or not depends on whether
all its prerequisites are distributed, and whether the user of your
tarballs has the 'commands' available.

A few (more or less unrelated) nits below.

> export LORICA_ROOT = $(LORICA_top_dir)

FWIW, 'export' is GNU make-specific (several instances).

> TAO_LIBS = \
>       $(ACE_ROOT)/ace/libACE.dylib                            \
> TAO_LIBS = \

This looks very unportable to other systems.  Why do you not just use
libtool libraries, forget about the difference between darwin and linux,
and gain portability to BSDs and several other systems on the way?

Erm, if those TAO libs are not yours, then you should go and suggest
this to their author, I guess.


Why is that necessary?  Killing parallel make is such a performance
breaker.  And this is GNU make-specific, too, by the way.  If you cannot
specify the full dependency graph, maybe you can require GNU make 3.81
and use order-only dependencies for at least some parallelism?

>       cd $(ACE_ROOT) && $(SVN) up
>       cd $(TAO_ROOT) && $(ACE_ROOT)/bin/ TAO_ACE.mwc -type gnuace
> endif
>       cd $(ACE_ROOT)/ace                 && CXX="$(CXX) $ 

If you are aiming to overwrite CXX for the makefile in question,
then either use
  $(MAKE) -f GNUmakefile CXX='$(CXX) ...'

or use
  CXX='$(CXX) ...' $(MAKE) -e -f GNUmakefile

otherwise that won't work.  With non-GNU make, the first of the two
possibilities does not always override variables initialized in the

Hope that helps.


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