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| From: | Michael Hennebry |
| Subject: | Re: [avr-chat] tiny2313 spi slave |
| Date: | Thu, 11 Dec 2008 17:17:36 -0600 (CST) |
| User-agent: | Alpine 1.00 (DEB 882 2007-12-20) |
On Thu, 11 Dec 2008, Steve Franks wrote:
Anyone successfully done an spi slave on a tiny2313? This unbuffered shift register is junk. I can't seem to empty it fast enough at 8MHz, even removing all my debugging statements from mainloop, and running the spi master at 100kHz, and reseting the edge counter on every rising edge of CS. Enough time debugging. Time to use the uart instead...
It seems that the slave could use more time *between* bytes. What happens if the SPI clock rate is F_CPU/6 and the time between bytes is 200 cycles? What is the slave CPU frequency? Are you sure? -- Michael address@hidden "Pessimist: The glass is half empty. Optimist: The glass is half full. Engineer: The glass is twice as big as it needs to be."
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