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Re: [avr-gcc-list] Trouble with division
From: |
Ulrich Schweitzer |
Subject: |
Re: [avr-gcc-list] Trouble with division |
Date: |
Sun, 15 Jun 2003 10:23:48 +0200 |
User-agent: |
KMail/1.4.3 |
On Saturday 14 June 2003 20:28, Joerg Wunsch wrote:
> >INTERRUPT(SIG_OVERFLOW0)
>
> That's probably your problem. Make this SIGNAL(SIG_OVERFLOW0).
>
> SIGNAL() is not interruptible, INTERRUPT() is.
I know, but it is INTERRUPT on purpose. There are other interrupts that
need to be able to interrupt this routine.
> Division by a power of 2 is magnitudes faster than division by an
> arbitrary number. I guess your timer is running at a fast speed, so
> the interrupt handler is interrupted again.
>
> Of course, while SIGNAL() will prevent this from happen, you'll lose
> interrupts. Consider using something else than an expensive division,
> or run it at a lower tick rate.
Yes you are right, the counter is running at full speed. Unfortunatelly I
need the resolution of full speed and also cannot afford to lose
interrupts. If I can't avoid the division (I'm not sure, yet), I could
try to raise the clock frequency (it's only 1Mhz now) and then use the
prescaler to keep the counter at the same rate. How many clock cycles
does the divison of a uint16 through a uint8 take?
Ulrich
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