Fixing m68k movec disassembly

[Jonathan S. Shapiro]

I've gotten annoyed enough to want to fix something :-)

The disassembly logic for M68k MOVEC is awful. To do it right requires
knowledge of the actual target CPU model, and we don't have that from
BFD. We *do* have the target architecture level, and we can at least use
that to refine the output.

My proposal is that m68k disassembly should only emit a movec register
mnemonic when it actually knows (based on target arch) that the mnemonic
is correct. In other cases it should emit the numeric register number. I
have some code that sensitizes the mnemonic selection to target
architecture variant, but I would appreciate feedback on whether this
seems sensible before submitting the patch.

Also, my impression is that the target CPU *can* be specified on the
command line (via -m), and in that case greater precision is possible.
I'ld like to update the patch to deal with that. Assuming that the user
has told us a CPU on the command line via -m, how can that cpu name be
found from code running in opcodes/m68k-dis.c?


Thanks

shap