[Bug binutils/10924] Bug in objdump when disassembling raw armv4t binaries

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2009-12-14 
16:38 -------
Subject: Bug 10924

CVSROOT:        /cvs/src
Module name:    src
Changes by:     address@hidden  2009-12-14 16:38:23

Modified files:
        opcodes        : ChangeLog arm-dis.c 
        gas/testsuite  : ChangeLog 
Added files:
        gas/testsuite/gas/arm: unpredictable.d unpredictable.s 

Log message:
        PR binutils/10924
        * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
        results in unpredictable behaviour.
        (print_insn_arm): Handle %R.
        
        * gas/arm/unpredictable.s: New test case - checks the disassembly
        of instructions with unpredictable behaviour.
        * gas/arm/unpredictable.d: New file - expected disassembly.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1517&r2=1.1518
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.117&r2=1.118
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1603&r2=1.1604
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/unpredictable.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/unpredictable.s.diff?cvsroot=src&r1=NONE&r2=1.1



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http://sourceware.org/bugzilla/show_bug.cgi?id=10924

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