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[Bug ld/15628] New: Cortex M4 incorrect blx instruction generated

From: matti at henttunen dot se
Subject: [Bug ld/15628] New: Cortex M4 incorrect blx instruction generated
Date: Fri, 14 Jun 2013 13:09:17 +0000


            Bug ID: 15628
           Summary: Cortex M4 incorrect blx instruction generated
           Product: binutils
           Version: 2.24 (HEAD)
            Status: NEW
          Severity: normal
          Priority: P2
         Component: ld
          Assignee: unassigned at sourceware dot org
          Reporter: matti at henttunen dot se

It seems incorrect code is generated when I compile the following example

int test()
        return 1;
arm-none-eabi-gcc -fPIC -mcpu=cortex-m4 -mthumb -O2 -ggdb  mylib.c -o mylib.so
arm-none-eabi-gcc -mcpu=cortex-m4 -mthumb -O2 -ggdb  -lmylib main.c -o test

int main()
        return 1;

The machine generated code for main looks as follows (objdump -D):
0000015c <main>:
 15c:   b508            push    {r3, lr}
 15e:   f000 e888       blx     270 <__libc_fini_array+0xfc>
 162:   2001            movs    r0, #1
 164:   bd08            pop     {r3, pc}
 166:   bf00            nop

instruction at  15e:   seems incorrect to me, since M4 only branches using 
a register   blx{cond} Rm, (M3 seems to be ok with label aswell.)

Ive tried to use -mlong-calls, and it produces:
00000164 <main>:
 164:   b508            push    {r3, lr}
 166:   f240 237c       movw    r3, #636        ; 0x27c
 16a:   f2c0 0300       movt    r3, #0
 16e:   4798            blx     r3
 170:   2001            movs    r0, #1
 172:   bd08            pop     {r3, pc}

This looks OK except for the address in R3 not being rellative, since it's 
absolute it's not correct either (or am I missing something)

is a workaround for this, or am I doing something wrong here ?


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