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From: Sławomir Wojtasiak
Subject: Bug in FDIV/FDIVR.
Date: Sat, 04 Jan 2014 20:50:36 +0100
User-agent: home.pl my.webmail/2.1


I have probably found a bug in GAS assembler/disassembler. It looks like the 
following instructions are just inverted:

Every Intel like assembler/disassembler I have already tested, encodes it 
like this:
DC F9            fdiv        st(1),st 
DC F1            fdivr       st(1),st 

This is expected behaviour taking into account Intel manual.

In case of GAS:

0xdc, 0xf9 fdivr %st,%st(1)
0xdc, 0xf1 fdiv  %st,%st(1)

Instructions are inverted. As you can see, fdivr instruction has been used 
in the place where Intel used fdiv. This problem exists only for this 
specific addressing mode:

DC F8+i FDIV ST(i), ST(0)
DC F0+i FDIVR ST(i), ST(0)

Sławomir Wojtasiak
slawomir *DOT* wojtasiak *AT* swksoftware *DOT* pl

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