[Bug ld/16017] LD creates invalid PLT instructions on CORTEX-M3

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=16017

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https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=eed94f8f8eddbd2268fc317508044bedc81a4e70

commit eed94f8f8eddbd2268fc317508044bedc81a4e70
Author: Nick Clifton <address@hidden>
Date:   Tue Mar 4 15:25:53 2014 +0000

    Install patch for PR ld/16017.  This adds support for generating PLT
entries
    using Thumb2 instructions for those cores which do not support the ARM ISA.

        * elf32-arm.c (elf32_thumb2_plt0_entry): New array.
        (elf32_thumb2_plt_entry): New array.
        (elf32_arm_create_dynamic_sections): Set PLT entry sizes when
        using thumb2 based PLT.
        (elf32_arm_populate_plt_entry): Handle generating Thumb2 based PLT
        entries.
        (elf32_arm_final_link_relocate): Do not bias jumps to Thumb based
        PLT entries.
        (elf32_arm_finish_dynamic_sections): Handle creation of Thumb2
        based PLT 0-entry.
        (elf32_arm_output_plt_map_1): Handle creation of local symbols for
        Thumb2 based PLT 0-entry.
        (elf32_arm_output_arch_local_syms): Handle creation of local
        symbols for Thumb2 based PLT entries.

-----------------------------------------------------------------------

Summary of changes:
 bfd/ChangeLog   |   18 +++++
 bfd/elf32-arm.c |  188 ++++++++++++++++++++++++++++++++++++++++++------------
 2 files changed, 164 insertions(+), 42 deletions(-)

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