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as allows too many registers for vldm/vstm (ARMv7/8)

From: Pekka Seppänen
Subject: as allows too many registers for vldm/vstm (ARMv7/8)
Date: Thu, 28 Jul 2016 16:30:19 +0300
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It seems that as currently allows too many doubleword (or quadword alias) registers to be given for vldm/vstm (vpop/vpush) instructions on NEON MPE enabled platforms. Both ARMv7 and ARMv8 architecture reference manuals clearly state that vldm/vstm instructions must not use more than 16 doubleword registers (while using more than 16 singleword registers would be fine). I didn't try on ARMv8, but at least on ARMv7 spec hardware vldm/vstm with 17 or more doubleword registers raise an undefined instruction exception (as pretty much expected based on the ARM ARM).

I guess the related code is around config/tc-arm.c, parse_vfp_reg_list. In this case the naming in the code has become is a bit ambiguous -- I'm assuming the code dates to pre-v6 ages when fldm/fstm either didn't have such a restriction or it simply wasn't documented. While max_regs / count ensures that used registers fall within the d0 .. d31 or d0 .. d15 (VFPv3-D16) range it doesn't check that the size of the register list itself doesn't exceed 16 registers when using doubleword registers and a vldm/vstm instruction. (Note that this issue has nothing to with the said VFPv3-D16 register limitation, you may use d16 .. d31 registers as you will but you simply must operate with 16 or less doubleword registers at a time.)

So, while as properly rejects e.g. vpop {d16-d32} (invalid d32 register within the range) it doesn't reject vpop {d0-d16} or vpop {q0-q8} alias (too many d<N> registers within the range), for which the generated opcode will eventually fail if executed. I'm not sure how trivial the possible fix is, i.e. are there older platforms on which you could've used fldm/fstm with more than 16 doubleword registers etc.

-- Pekka

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