[Bug ld/20868] ld relaxes TLS access erroneously for aarch64 in ilp32 mode

[jiwang at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=20868

--- Comment #3 from Jiong Wang <jiwang at gcc dot gnu.org> ---
Hi Yury,

Some quick thoughts:

>   
> But in executalbe binary ld relaxes tls access with direct address
> calculation:
> 279         register unsigned long __result asm ("w0");
> 280         asm volatile ("adrp %0, :tlsgd:foo; \n"
> 281   400618:       90000080        adrp    x0, 410000 <__FRAME_END__+0xf828>
> 282   40061c:       f948ec00        ldr     x0, [x0,#4568]
> 283   400620:       d53bd041        mrs     x1, tpidr_el0
> 284   400624:       8b000020        add     x0, x1, x0

The sequences is still loading tls offset from GOT table, then add it to the
tp.  It seems to me be a GD->IE bug on ILP32.

Can you try to modify 0xf9400000 to 0xb9400000 in elfNN_aarch64_tls_relax when
relaxing BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC, does it work for you?

The "ldr     x0, [x0,#4568]" looks suspicous to me.  the x0 implies 8bytes
scale, while ILP32 relocations are doing 4bytes shift.

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