[Bug binutils/21446] New: Incorrect disassembly for msr to dbgdtrtx_el0 in AArch64

[chris_s_jones at yahoo dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=21446

            Bug ID: 21446
           Summary: Incorrect disassembly for msr to dbgdtrtx_el0 in
                    AArch64
           Product: binutils
           Version: 2.28
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: binutils
          Assignee: unassigned at sourceware dot org
          Reporter: chris_s_jones at yahoo dot com
  Target Milestone: ---

Created attachment 10032
  --> https://sourceware.org/bugzilla/attachment.cgi?id=10032&action=edit
Test case

The AArch64 system registers dbgdtrrx_el0 and dbgdtrtx_el0 use the same
encoding, but the former is only used for MRS instructions and the latter for
MSR.

Assembling the following code:
.text
            msr     dbgdtrtx_el0, x3
            mrs     x3, dbgdtrrx_el0

And then disassembling with objdump gives the incorrect register name for the
MSR

0000000000000000 <.text>:
   0:   d5130503        msr     dbgdtrrx_el0, x3
   4:   d5330503        mrs     x3, dbgdtrrx_el0

The resulting binary is, of course, fine, but the disassembly output is off for
the MSR.

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