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[Bug gas/22598] [RISCV] No way to disable two-instruction sequences for

From: asb at lowrisc dot org
Subject: [Bug gas/22598] [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions
Date: Wed, 10 Jan 2018 09:10:33 +0000


--- Comment #10 from Alex Bradbury <asb at lowrisc dot org> ---
Actually I was too quick to respond, it doesn't seem that GNU as is treating
immediate arguments to branches in MIPS as absolute addresses:

$ cat test.s
beq $6, $7, 128
bne $4, $5, 64
beq $6, $7, 128
bne $4, $5, 64

$ ./bin/mips-img-elf-as test.s
$ ./bin/mips-img-elf-objdump -dr test.o 

test.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <lab>:
   0:   10c70020        beq     a2,a3,84 <lab+0x84>
                        0: R_MIPS_PC16  *ABS*
   4:   00000000        nop
   8:   14850010        bne     a0,a1,4c <lab+0x4c>
                        8: R_MIPS_PC16  *ABS*
   c:   00000000        nop
  10:   10c70020        beq     a2,a3,94 <lab+0x94>
                        10: R_MIPS_PC16 *ABS*
  14:   00000000        nop
  18:   14850010        bne     a0,a1,5c <lab+0x5c>
                        18: R_MIPS_PC16 *ABS*
  1c:   00000000        nop

You'll note two things:
1) The assembly won't actually round-trip in a sensible way (i.e. re-assembling
the disassembly will not give the desired result)
2) The first beq $6, $7, 128 refers to <lab+0x84> and the second refers to

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