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[Bug gas/23305] New: RISC-V illegal operands with lla and .set


From: address@hidden
Subject: [Bug gas/23305] New: RISC-V illegal operands with lla and .set
Date: Mon, 18 Jun 2018 12:30:49 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=23305

            Bug ID: 23305
           Summary: RISC-V illegal operands with lla and .set
           Product: binutils
           Version: unspecified
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: gas
          Assignee: unassigned at sourceware dot org
          Reporter: address@hidden
  Target Milestone: ---

The following test assembler file:

        .option nopic
        .text

        .globl sym
        .set sym, 0xabc

        .align  1
        .globl  f
        .type   f, @function
f:
        lla     a0,sym
        ret
        .size   f, .-f

Leads to:

riscv32-rtems5-as -march=rv64gc -mabi=lp64 lla.s
lla.s: Assembler messages:
lla.s:11: Error: illegal operands `lla a0,sym'

This code can be generated by GCC with:

extern char sym[];

__asm__(
  "\t.globl sym\n"
  "\t.set sym, 0xabc\n"
);

long f(void)
{
        return (long)sym;
}

riscv32-rtems5-gcc -S -o - test.c -march=rv64gc -mabi=lp64 -mcmodel=medany -O2
        .file   "test.c"
        .option nopic
        .text
 #APP
        .globl sym
        .set sym, 0xabc

 #NO_APP
        .align  1
        .globl  f
        .type   f, @function
f:
        lla     a0,sym
        ret
        .size   f, .-f
        .ident  "GCC: (GNU) 9.0.0 20180605

Using -mcmodel=medlow works since a different load sequence is generated:

        lui     a0,%hi(sym)
        addi    a0,a0,%lo(sym)

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