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[Bug gas/23628] New: Mis-assembling of VSIB offset in EVEX scatter/gathe


From: thiago at kde dot org
Subject: [Bug gas/23628] New: Mis-assembling of VSIB offset in EVEX scatter/gather instructions
Date: Mon, 10 Sep 2018 22:24:32 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=23628

            Bug ID: 23628
           Summary: Mis-assembling of VSIB offset in EVEX scatter/gather
                    instructions
           Product: binutils
           Version: 2.31
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: gas
          Assignee: unassigned at sourceware dot org
          Reporter: thiago at kde dot org
  Target Milestone: ---

Related to bug #16490. This was reported also as a note in bug #18738.

Test:

$ cat test.s
.text                                                                           
        vpgatherqd      12(,%zmm3,1), %ymm1{%k2}
        vpgatherqd      12(%rax,%zmm3,1), %ymm1{%k2}
        vpgatherqd      512(,%zmm3,1), %ymm1{%k2}
        vpgatherqd      512(%rax,%zmm3,1), %ymm1{%k2}
        vpgatherqd      %xmm2, 12(,%ymm3,1), %xmm1
$ as test.s
$ objdump -dr a.out
a.out:     file format elf64-x86-64


Disassembly of section .text:

0000000000000000 <.text>:
   0:   62 f2 7d 4a 91 0c 1d    vpgatherqd 0x3(,%zmm3,1),%ymm1{%k2}
   7:   03 00 00 00 
   b:   62 f2 7d 4a 91 4c 18    vpgatherqd 0xc(%rax,%zmm3,1),%ymm1{%k2}
  12:   03 
  13:   62 f2 7d 4a 91 0c 1d    vpgatherqd 0x200(,%zmm3,1),%ymm1{%k2}
  1a:   00 02 00 00 
  1e:   62 f2 7d 4a 91 8c 18    vpgatherqd 0x200(%rax,%zmm3,1),%ymm1{%k2}
  25:   00 02 00 00 
  29:   c4 e2 6d 91 0c 1d 0c    vpgatherqd %xmm2,0xc(,%ymm3,1),%xmm1
  30:   00 00 00 

As can be seen on the first instruction, the constant "12" became 0x3. This
problem only appears to exist when the displacement is small enough to fit an
8-bit and when the base register is missing (that is, absolute pointers stored
in the ZMM register).

This is likely caused by the disp8 scaling performed when the disp8 is used
with a base register (see second instruction). It does not happen when the
displacement is larger than 8 bits (third and fourth instructions), nor in the
AVX2 equivalent.

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