[Bug binutils/24390] objdump decode of mtfsb* instructions has odd output

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=24390

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by Alan Modra <address@hidden>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=96a86c01d119372f4af5aff2501d3104e6c1a8e3

commit 96a86c01d119372f4af5aff2501d3104e6c1a8e3
Author: Alan Modra <address@hidden>
Date:   Thu Mar 28 10:36:55 2019 +1030

    PR24390, Don't decode mtfsb field as a cr field

    "mtfsb0 4*cr7+lt" doesn't make all that much sense, but unfortunately
    glibc uses just that instead of "mtfsb0 28" to clear the fpscr xe bit.
    So for backwards compatibility accept cr field expressions when
    assembling mtfsb operands, but disassemble to a plain number.

        PR 24390
    include/
        * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
    opcodes/
        * ppc-opc.c (BTF): Define.
        (powerpc_opcodes): Use for mtfsb*.
        * ppc-dis.c (print_insn_powerpc): Print fields with both
        PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
    gas/
        * testsuite/gas/ppc/476.d: Update mtfsb*.
        * testsuite/gas/ppc/a2.d: Likewise.

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