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[Bug binutils/24739] RISC-V Disassembler should default to little endian


From: address@hidden
Subject: [Bug binutils/24739] RISC-V Disassembler should default to little endian
Date: Wed, 26 Jun 2019 16:11:21 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=24739

--- Comment #1 from Andreas Schwab <address@hidden> ---
When using an object format without associated endianess (like binary) the
RISC-V disassembler currently formats the instruction bytes in big endian
format, because that's how it happens to work out if info->display_endian is
BFD_ENDIAN_UNKNOWN.  Using little endian by default is probably more useful.

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