[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Bug gas/27145] New: [AArch64] opcodes/aarch64-opc.c: missing system reg
From: |
address@hidden |
Subject: |
[Bug gas/27145] New: [AArch64] opcodes/aarch64-opc.c: missing system registers |
Date: |
Sun, 03 Jan 2021 19:47:52 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=27145
Bug ID: 27145
Summary: [AArch64] opcodes/aarch64-opc.c: missing system
registers
Product: binutils
Version: 2.36 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: sebastian.huber@embedded-brains.de
Target Milestone: ---
The following system registers are defined in "Arm Architecture Reference
Manual, Armv8, for Armv8-A architecture profile" issue F.c in chapter D13
"AArch64 System Register Descriptions" and not supported by
"opcodes/aarch64-opc.c":
AMCFGR_EL0
AMCG1IDR_EL0
AMCGCR_EL0
AMCNTENCLR0_EL0
AMCNTENCLR1_EL0
AMCNTENSET0_EL0
AMCNTENSET1_EL0
AMCR_EL0
AMEVCNTR0_N_EL0
AMEVCNTR1_N_EL0
AMEVCNTVOFF0_N_EL2
AMEVCNTVOFF1_N_EL2
AMEVTYPER0_N_EL0
AMEVTYPER1_N_EL0
AMUSERENR_EL0
CCSIDR2_EL1
CNTPCTSS_EL0
CNTPOFF_EL2
CNTVCTSS_EL0
DBGBCR_N_EL1
DBGBVR_N_EL1
DBGWCR_N_EL1
DBGWVR_N_EL1
HAFGRTR_EL2
HDFGRTR_EL2
HDFGWTR_EL2
HFGITR_EL2
HFGRTR_EL2
HFGWTR_EL2
ID_DFR1_EL1
ID_ISAR6_EL1
ID_MMFR5_EL1
LORC_EL1
LOREA_EL1
LORID_EL1
LORN_EL1
LORSA_EL1
PMEVCNTR_N_EL0
PMEVTYPER_N_EL0
PMMIR_EL1
TRFCR_EL1
TRFCR_EL2
--
You are receiving this mail because:
You are on the CC list for the bug.
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Bug gas/27145] New: [AArch64] opcodes/aarch64-opc.c: missing system registers,
address@hidden <=