[Bug gas/27732] RISC-V: Compress "addi a0, a1, 0" to "c.mv a0, a1"

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=27732

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by LifangXia <lifangxia@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=a8ab20932084328fb48930c028b60a348c6644b3

commit a8ab20932084328fb48930c028b60a348c6644b3
Author: Lifang Xia <lifang_xia@c-sky.com>
Date:   Thu Apr 15 10:51:14 2021 +0800

    RISC-V: compress "addi d,CV,z" to "c.mv d,CV"

    PR 27732
    gas/
            * testsuite/gas/riscv/c-zero-imm.d: Compress addi a4,a4,0 to
            c.mv a4,a4.
            * testsuite/gas/riscv/c-zero-imm.s: Likewise.
    opcodes/
            * riscv-opc.c (riscv_opcodes): New insn alias for addi. Compress
            "addi d,CV,z" to "c.mv d,CV".

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