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[Bug binutils/27916] RISC-V: Porting ARM/AARCH64 mapping symbols to risc


From: cvs-commit at gcc dot gnu.org
Subject: [Bug binutils/27916] RISC-V: Porting ARM/AARCH64 mapping symbols to riscv.
Date: Mon, 30 Aug 2021 09:37:23 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=27916

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by Nelson Chu <nelsonc1225@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=9b9b1092f0a8e6b7d240ea05a74968a883b8a05c

commit 9b9b1092f0a8e6b7d240ea05a74968a883b8a05c
Author: Nelson Chu <nelson.chu@sifive.com>
Date:   Tue Jul 13 03:09:38 2021 -0700

    RISC-V: PR27916, Support mapping symbols.

    Similar to ARM/AARCH64, we add mapping symbols in the symbol table,
    to mark the start addresses of data and instructions.  The $d means
    data, and the $x means instruction.  Then the disassembler uses these
    symbols to decide whether we should dump data or instruction.

    Consider the mapping-04 test case,
    $ cat tmp.s
      .text
      .option norelax
      .option norvc
      .fill 2, 4, 0x1001
      .byte 1
      .word 0
      .balign 8
      add a0, a0, a0
      .fill 5, 2, 0x2002
      add a1, a1, a1
      .data
      .word 0x1             # No need to add mapping symbols.
      .word 0x2

    $ riscv64-unknown-elf-as tmp.s -o tmp.o
    $ riscv64-unknown-elf-objdump -d tmp.o

    Disassembly of section .text:

    0000000000000000 <.text>:
       0:   00001001         .word   0x00001001  # Marked $d, .fill directive.
       4:   00001001         .word   0x00001001
       8:   00000001         .word   0x00000001  # .byte + part of .word.
       c:   00               .byte   0x00        # remaining .word.
       d:   00               .byte   0x00        # Marked $d, odd byte of
alignment.
       e:   0001             nop                 # Marked $x, nops for
alignment.
      10:   00a50533         add     a0,a0,a0
      14:   20022002         .word   0x20022002  # Marked $d, .fill directive.
      18:   20022002         .word   0x20022002
      1c:   2002             .short  0x2002
      1e:   00b585b3         add     a1,a1,a1    # Marked $x.
      22:   0001             nop                 # Section tail alignment.
      24:   00000013         nop

    * Use $d and $x to mark the distribution of data and instructions.
      Alignments of code are recognized as instructions, since we usually
      fill nops for them.

    * If the alignment have odd bytes, then we cannot just fill the nops
      into the spaces.  We always fill an odd byte 0x00 at the start of
      the spaces.  Therefore, add a $d mapping symbol for the odd byte,
      to tell disassembler that it isn't an instruction.  The behavior
      is same as Arm and Aarch64.

    The elf/linux toolchain regressions all passed.  Besides, I also
    disable the mapping symbols internally, but use the new objudmp, the
    regressions passed, too.  Therefore, the new objudmp should dump
    the objects corretly, even if they don't have any mapping symbols.

    bfd/
            pr 27916
            * cpu-riscv.c (riscv_elf_is_mapping_symbols): Define mapping
symbols.
            * cpu-riscv.h: extern riscv_elf_is_mapping_symbols.
            * elfnn-riscv.c (riscv_maybe_function_sym): Do not choose mapping
            symbols as a function name.
            (riscv_elf_is_target_special_symbol): Add mapping symbols.
    binutils/
            pr 27916
            * testsuite/binutils-all/readelf.s: Updated.
            * testsuite/binutils-all/readelf.s-64: Likewise.
            * testsuite/binutils-all/readelf.s-64-unused: Likewise.
            * testsuite/binutils-all/readelf.ss: Likewise.
            * testsuite/binutils-all/readelf.ss-64: Likewise.
            * testsuite/binutils-all/readelf.ss-64-unused: Likewise.
    gas/
            pr 27916
            * config/tc-riscv.c (make_mapping_symbol): Create a new mapping
symbol.
            (riscv_mapping_state): Decide whether to create mapping symbol for
            frag_now.  Only add the mapping symbols to text sections.
            (riscv_add_odd_padding_symbol): Add the mapping symbols for the
            riscv_handle_align, which have odd bytes spaces.
            (riscv_check_mapping_symbols): Remove any excess mapping symbols.
            (md_assemble): Marked as MAP_INSN.
            (riscv_frag_align_code): Marked as MAP_INSN.
            (riscv_init_frag): Add mapping symbols for frag, it usually called
            by frag_var.  Marked as MAP_DATA for rs_align and rs_fill, and
            marked as MAP_INSN for rs_align_code.
            (s_riscv_insn): Marked as MAP_INSN.
            (riscv_adjust_symtab): Call riscv_check_mapping_symbols.
            * config/tc-riscv.h (md_cons_align): Defined to riscv_mapping_state
            with MAP_DATA.
            (TC_SEGMENT_INFO_TYPE): Record mapping state for each segment.
            (TC_FRAG_TYPE): Record the first and last mapping symbols for the
            fragments.  The first mapping symbol must be placed at the start
            of the fragment.
            (TC_FRAG_INIT): Defined to riscv_init_frag.
            * testsuite/gas/riscv/mapping-01.s: New testcase.
            * testsuite/gas/riscv/mapping-01a.d: Likewise.
            * testsuite/gas/riscv/mapping-01b.d: Likewise.
            * testsuite/gas/riscv/mapping-02.s: Likewise.
            * testsuite/gas/riscv/mapping-02a.d: Likewise.
            * testsuite/gas/riscv/mapping-02b.d: Likewise.
            * testsuite/gas/riscv/mapping-03.s: Likewise.
            * testsuite/gas/riscv/mapping-03a.d: Likewise.
            * testsuite/gas/riscv/mapping-03b.d: Likewise.
            * testsuite/gas/riscv/mapping-04.s: Likewise.
            * testsuite/gas/riscv/mapping-04a.d: Likewise.
            * testsuite/gas/riscv/mapping-04b.d: Likewise.
            * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise.
            * testsuite/gas/riscv/mapping-norelax-04b.d: Likewise.
            * testsuite/gas/riscv/no-relax-align.d: Updated.
            * testsuite/gas/riscv/no-relax-align-2.d: Likewise.
    include/
            pr 27916
            * opcode/riscv.h (enum riscv_seg_mstate): Added.

    opcodes/
            pr 27916
            * riscv-dis.c (last_map_symbol, last_stop_offset, last_map_state):
            Added to dump sections with mapping symbols.
            (riscv_get_map_state): Get the mapping state from the symbol.
            (riscv_search_mapping_symbol): Check the sorted symbol table, and
            then find the suitable mapping symbol.
            (riscv_data_length): Decide which data size we should print.
            (riscv_disassemble_data): Dump the data contents.
            (print_insn_riscv): Handle the mapping symbols.
            (riscv_symbol_is_valid): Marked mapping symbols as invalid.

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