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[Bug binutils/25202] objcopy --verilog-data-width doesn't respect target


From: nickc at redhat dot com
Subject: [Bug binutils/25202] objcopy --verilog-data-width doesn't respect target's endianness
Date: Thu, 03 Nov 2022 13:50:23 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=25202

--- Comment #6 from Nick Clifton <nickc at redhat dot com> ---
Created attachment 14432
  --> https://sourceware.org/bugzilla/attachment.cgi?id=14432&action=edit
Proposed patch

Please can somebody try out this patch ?

It *might* work, but all this endian-ness stuff is doing my head in.

The patch adds a new command line option to objcopy:

  --verilog-data-endianness=input

which tells the verilog converter to use the endian-ness of the input file,
instead of the default endian-ness.  (Which is set to 'unknown' and by the
logic in bfd/verilog.c:verilog_write_record() equates to 'big-endian').

The patch also adds --verilog-data-endianness=big and
--verilog-data-endianness=little although I am not sure if these will actually
be useful.

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