[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: User-space device drivers: ``interface to interrupt hardware'' (was:

From: Marcus Brinkmann
Subject: Re: User-space device drivers: ``interface to interrupt hardware'' (was: writing device drivers in Java)
Date: Sun, 23 Sep 2007 19:15:02 +0200
User-agent: Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (Shijō) APEL/10.6 Emacs/23.0.0 (i486-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO)

At Tue, 18 Sep 2007 21:09:15 +0200,
Thomas Schwinge <tschwinge@gnu.org> wrote:
> I'm also interested in that, I may add.  I was -- already some months
> ago; then I had to interrupt because of more stringent issues taking over
> -- thinking about attempting such a project, starting with reading papers
> about (a proposal for?) L4's way of handling hardware interrupts in user
> space servers.  <http://os.inf.tu-dresden.de/~hohmuth/prj/omega0.ps.gz>
> -- ``Omega0 -- a portable interface to interrupt hardware for L4
> systems.'' by J. Löser and M. Hohmuth.
> Can any of the L4-savvy people (Marcus?, Neal?) comment on this?  Is this
> feasible for Mach as well?  Is this what L4 is still using?  I can see
> code for this in the TU Dresden L4 repository, so i guess they're
> actually actively using this proposed interface?
> What is Minix doing?  Or other microkernel-based systems?

From a microkernel perspective, user space drivers are rather simple.
You need IRQ delivery and DMA transfer.

IRQ delivery can be modeled as an RPC from the device (as a virtual
thread) to the user space server.  The microkernel might have to do
some masking, and you can have elaborate arguments about when
interrupts should be acknowledged, but the basic model stays the same.

DMA access can be modeled as shared memory between the device (as a
virtual address space) and the driver.  There are two caveats: The
driver may need to know the physical address of the mapped memory, and
for some old hardware like ISA there may be a restriction on the
physical address (below 1 MB or whatever).

However, for practical reasons, there is an additional requirement:
The microkernel-imposed overhead due to additional context switches
must be low enough.


reply via email to

[Prev in Thread] Current Thread [Next in Thread]