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SMP, barriers, etc.

From: Samuel Thibault
Subject: SMP, barriers, etc.
Date: Wed, 23 Dec 2009 21:08:06 +0100
User-agent: Mutt/1.5.12-2006-07-14

(I've cleaned To: and subject a bit :)

Da Zheng, le Wed 23 Dec 2009 21:23:23 +0800, a écrit :
> Samuel Thibault wrote:
> >> Is there anything else we should worry about?
> > Ordering. See /usr/src/linux/Documentation/memory-barriers.txt
> It's a long file. There are a lot to study:)

Yes, it's very instructive.

> >> Then the use of volatile is very limited and the only case I can think of 
> >> is something like signal handling where there is long jump.
> > 
> > There's also memory-mapped hardware registers (for which the OS has to
> > disable processor cache too, of course).
> You mean memory-mapped IO?


> Does it mean all machines have to provide at least one instruction
> that can modify variables in memory direct? so we can implement
> spin_lock or something similar.

Yes. An architecture that wouldn't provide at least an atomic test and
set would be a nightmare to program (just memory barriers is theorically
enough, but it's a nightmare :) )


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