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Re: cache coherency in DMA and MMIO
From: |
Samuel Thibault |
Subject: |
Re: cache coherency in DMA and MMIO |
Date: |
Sat, 24 Apr 2010 12:37:11 +0200 |
User-agent: |
Mutt/1.5.12-2006-07-14 |
Da Zheng, le Sat 24 Apr 2010 18:29:50 +0800, a écrit :
> On 10-4-23 下午7:37, Samuel Thibault wrote:
> > Da Zheng, le Fri 23 Apr 2010 14:51:22 +0800, a écrit :
> >> They are not just one or two variables. They are an array of structure
> >> variables. Should I define all fields of the structure with volatile
> >> qualifier?
> >
> > You can qualify the whole structure
> >
> >> It's strange. The Linux driver doesn't do so but it definitely works in the
> >> Linux kernel.
> >
> > It does (or should do): such pointers have the __io qualifier.
> I checked the code of e1000 again. The data for MMIO is qualified by __iomem,
Right, I hadn't checked the precise name :)
> but the data in the transmission or receiving queues (which are accessed by
> DMA)
> doesn't have __iomem or any similar qualifiers.
Because they are only accessed by DMA, aren't they?
> I guess the data in the transmission queue is very unlikely to be in
> registers when the driver accesses it.
You said yourself that DMAs take care of cache coherency :)
(and I indeed guess they do).
Samuel
- cache coherency in DMA and MMIO, Da Zheng, 2010/04/22
- Re: cache coherency in DMA and MMIO, Samuel Thibault, 2010/04/22
- Re: cache coherency in DMA and MMIO, Samuel Thibault, 2010/04/22
- Re: cache coherency in DMA and MMIO, Da Zheng, 2010/04/23
- Re: cache coherency in DMA and MMIO, Samuel Thibault, 2010/04/23
- Re: cache coherency in DMA and MMIO, Da Zheng, 2010/04/24
- Re: cache coherency in DMA and MMIO,
Samuel Thibault <=
- Re: cache coherency in DMA and MMIO, Da Zheng, 2010/04/24
- Re: cache coherency in DMA and MMIO, Samuel Thibault, 2010/04/24