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Re: [PATCH 5/6] enable user access


From: Samuel Thibault
Subject: Re: [PATCH 5/6] enable user access
Date: Sat, 27 Aug 2022 21:07:27 +0200
User-agent: NeoMutt/20170609 (1.8.3)

Luca Dariz, le sam. 05 févr. 2022 18:51:28 +0100, a ecrit:
> The pmap module is a bit limited on 64 bit paging, so this should be
> refined when we'll be able to use addresses over 4G.
> 
> Signed-off-by: Luca Dariz <luca@orpolo.org>

Applied, thanks!

> ---
>  i386/intel/pmap.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c
> index d0bd3b5d..19b7b51c 100644
> --- a/i386/intel/pmap.c
> +++ b/i386/intel/pmap.c
> @@ -1298,7 +1298,7 @@ pmap_t pmap_create(vm_size_t size)
>                                 pa_to_pte(kvtophys((vm_offset_t) page_dir[i]))
>                                 | INTEL_PTE_VALID
>  #if !defined(MACH_HYP) || defined(MACH_PV_PAGETABLES)
> -                               | INTEL_PTE_WRITE
> +                               | INTEL_PTE_WRITE | INTEL_PTE_USER
>  #endif
>                                 );
>       }
> @@ -1309,7 +1309,7 @@ pmap_t pmap_create(vm_size_t size)
>                                                       != KERN_SUCCESS)
>               panic("pmap_create");
>       memset(p->l4base, 0, INTEL_PGBYTES);
> -     WRITE_PTE(&p->l4base[0], pa_to_pte(kvtophys((vm_offset_t) p->pdpbase)) 
> | INTEL_PTE_VALID | INTEL_PTE_WRITE);
> +     WRITE_PTE(&p->l4base[0], pa_to_pte(kvtophys((vm_offset_t) p->pdpbase)) 
> | INTEL_PTE_VALID | INTEL_PTE_WRITE | INTEL_PTE_USER);
>  #ifdef       MACH_PV_PAGETABLES
>       // FIXME: use kmem_cache_alloc instead
>       if (kmem_alloc_wired(kernel_map,
> -- 
> 2.30.2
> 
> 

-- 
Samuel
---
Pour une évaluation indépendante, transparente et rigoureuse !
Je soutiens la Commission d'Évaluation de l'Inria.



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