incompatibility with unix make

[Thomas Abendroth]

Hi,

I use GNU-make WIN32 version 3.79.1. for some days and I found out, that the
makefile code below does not work.
With Borland 'make' and Solaris 'make' the same makefile works perfectly.

best regards
Thomas

#----------------------- my simplified makefile -----------------#

ObjectDir = ./objects

#------------------------- compiler settings ---------------------#

UnixCompiler = cc
Msvc98Compiler = cl

UnixCflags = -c -Kpic -g -temp=/tmp
Msvc98Cflags = /nologo /MDd /W3 /Gm /GX /ZI /Od /D "WIN32" /c

UnixIncludePath = -I. -I../include
Msvc98IncludePath = /I "D:\Programme\Microsoft Visual Studio\VC98\include"
/I. /I../include

UnixObjExt = o
Win32ObjExt = obj

UnixObjName = -o $@
Msvc98ObjName = /Fo$@

UnixRemove = rm -f
Win32Remove = del

#I don't know any method for automatical setting on WIN32, so have to do it
manually

CC = $(Msvc98Compiler)
CFLAGS = $(MSvc98Cflags)
INCLUDE_PATH = $(Msvc98IncludePath)
OBJECT_NAME = $(Msvc98ObjName)
OBJ = $(Win32ObjExt)
RM = $(Win32Remove)

#------------------------- output ----------------------------#

Output = \
        $(ObjectDir)/mySourceFile.$(OBJ) \
        $(ObjectDir)/... \
        $(ObjectDir)/... \
        etc.

#------------------------ make -------------------------------#

all: $(Output)
        @echo "make finished"

clean:
        $(RM) $(Output)

#----------------------- compilation --------------------------#

.SUFFIXES: .$(OBJ).cpp

.cpp.$(OBJ):
                @echo " "
                @echo Compiling $<
                $(CC) $(CFLAGS) $(INCLUDE_PATH) $< $(OBJECT_NAME)

#--------------------- dependencies -----------------------------#

$(ObjectDir)/mySourceFile.$(OBJ): mySourceFile.cpp myHeaderFile.h

$(ObjectDir)/...

$(ObjectDir)/...

etc.

#----------------------- end of makefile ------------------------#