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Re: [BUG???] Targets within variables

From: Paul D. Smith
Subject: Re: [BUG???] Targets within variables
Date: Thu, 1 Jul 2004 01:52:21 -0400

%% Kyle Moffett <address@hidden> writes:

  >> define some_all
  >> all:
  >>        echo 'This is "all" speaking'
  >> endef
  >> $(some_all)

This is not legal.  In fact, it doesn't work (at least not for me).

Now, if you'd written this:

  define some_all
  all: ; @echo 'This is "all" speaking'

then _THAT_ would work.

Basically, the issue is that make reads its input line-by-line, and
every line can be exactly one thing: one target definition, one variable
definition, one command script line, etc.  Further, once that line is
read in then it is never "re-parsed" after variable expansion to see if
it magically became multiple lines during expansion.

So, because your example contains multiple lines it cannot work.
Because my example contains only one line, it does work.

  >> define some_all
  >> all:
  >> echo 'This is "all" speaking'
  >> .PHONY: all
  >> endef
  >> $(some_all)

This one is even less "correct" than your first one.

  km> I am not sure if the second case is in fact a bug, or if the first
  km> case is merely an unsupported feature, in which case I'd like to
  km> request such a feature.  On the other hand, perhaps there is a
  km> better way to do what I need to do.

Make sure you have GNU make 3.80 or better, and look up the $(eval ...)
function.  It allows you to do exactly what you're looking for here.

 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

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