Is it possible to cancel implicit rules, using suffix syntax?

[Niels Möller]

I'm trying the following Makefile for building an executable from a .c
source file:

: .SUFFIXES: .o .c
: .PRECIOUS: %.o
: 
: % : %.c
: .o:
:       echo linking
: .c.o:
:       echo compiling

This works like it should, for example

  $ touch foo.c
  $ make -n foo
  echo compiling
  echo linking
  $

However, for patterns that aren't overly fancy, I prefer using the old
fashioned suffix syntax, for compatibility with other makes[1]. The
pattern "% : %.c" is supposed to be equivalent to the single-suffix
rule ".c:". However, the Makefile

: .SUFFIXES: .o .c
: .PRECIOUS: %.o
: 
: .c:
: 
: .o:
:       echo linking
: .c.o:
:       echo compiling

doesn't work the same way. I get

  $ make -n foo
  cc     foo.c   -o foo
  $

i.e. the builtin rule for % : %.c is used.

Is there any way to express the chain of transformations %.c -> %.o ->
% using suffix rules? Extra bonus if I can also get the object files
to be treated as precious, without using any %-patterns.

I tested this with GNU make-3.80.

BTW, one of the make-3.80 test cases failed:

  make-3.80$ cat tests/work/features/parallelism.diff.1
  *** work/features/parallelism.base.1    Sun Oct 17 23:51:25 2004
  --- work/features/parallelism.log.1     Sun Oct 17 23:51:25 2004
  ***************
  *** 1,5 ****
  - ONE.inc
    THREE.inc
    TWO.inc
    ONE
    THREE
  --- 1,5 ----
    THREE.inc
  + ONE.inc
    TWO.inc
    ONE
    THREE
  make-3.80$

This is running on an debian GNU/Linux x86 system, linux-2.6.7.

Best regards,
/Niels

[1] I don't really know in detail how suffix rules work in other make
programs. I'd expect the two rules for .o: and .c.o: to do the right
thing, but perhaps suffix rules are just too broken?