[bug #21661] Make expands command-line variable defnitions after/during every command invocation

[Paul D. Smith]

Follow-up Comment #5, bug #21661 (project make):

Ah, now it's clear what the confusion is.  This happens because make puts
command line variable settings into the environment to be exported to the
subshell.  And, of course, before make can invoke a subshell it has to expand
all the variables that are to be exported.

See
http://www.gnu.org/software/make/manual/html_node/Variables_002fRecursion.html#Variables_002fRecursion

You can avoid this by adding an explicit "unexport var" to your makefile.

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