[bug #56778] 'define' ... 'endef' serializes sub-make invocations

[Paul D. Smith]

Update of bug #56778 (project make):

                  Status:                    None => Not A Bug              
             Open/Closed:                    Open => Closed                 

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Follow-up Comment #1:

Questions like this about how make works are best asked on the mailing lists,
such as address@hidden or address@hidden, rather than being reported as
bugs in the bug tracker.

This is expected behavior.  The details of why this happens are described in
https://www.gnu.org/software/make/manual/html_node/MAKE-Variable.html and look
up this error in the section
https://www.gnu.org/software/make/manual/html_node/Error-Messages.html

Basically in Makefile4 you have a rule like this:


all:
        $(my_rule)


the string $(my_rule) doesn't have an immediate reference to the $(MAKE)
variable so as far as make is concerned, this recipe does not invoke a
recursive make instance.

To tell make that it _does_ perform a recursive make instance, and thus avoid
the warning, you need to use the special + character.  You can either prefix
the variable reference in the recipe, like this:


all:
        +$(my_rule)


Or include it inside the define like this:


define my_rule
  +$(MAKE) -f $(lastword $(MAKEFILE_LIST)) SUB-MAKE=1 hello
endef


(note the TAB is not needed here because you already have a TAB before the
recipe where the $(my_rule) variable appears... you can include it or not it
doesn't matter).

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