Re: [PATCH 00/16] 64-bit RISC-V support

[Jan Nieuwenhuizen]

W. J. van der Laan writes:

Hello!

> This patch set is the bare minimum to make mescc self-hosting on 64 bit 
> RISC-V.

This is amazing, thank you!  I tried postponing my reply until I had a
full review, but that's going to take too long.

> The exact architecture targeted is RV64IM: 64-bit RISC-V with Multiply
> extension. A lowest common denominator. It also adds some basic constants to
> prepare for RISC-V 32 bit.
>
> Due to some compromises that were made around immediate values, alignment, and
> conditionals, current generated code is much slower than necessary. This can 
> be
> improved in future work.

Sure, that's a good compromise.

> I have developed and tested this on Fedora on a SiFive Unleashed board. All 
> the
> tests pass except for "pointer-arithmetic" and "extern", both for gcc and 
> mescc
> so at least they are on-par.

Beautiful!

> Required patches for M1 and hex2_linker can be found at
> https://github.com/laanwj/guix-mescc-tools/commits/riscv . I will upstream
> these to mescc-tools separately.

Okay, great.  I'll probably add a temporary commit for that to setup an
environment.  Have you tried running it with qemu emulation support?  We
tried that for ARM with mixed results...

Greetings,
Janneke

-- 
Jan Nieuwenhuizen <janneke@gnu.org> | GNU LilyPond http://lilypond.org
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