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Re: porting efforts
From: |
Ekaitz Zarraga |
Subject: |
Re: porting efforts |
Date: |
Sat, 15 Jan 2022 10:49:57 +0000 |
Also Gabriel,
You should take a look to this:
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases
ElenQ Technology
Ethical Innovation
‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Tuesday, December 21st, 2021 at 4:46 PM, Ekaitz Zarraga <ekaitz@elenq.tech>
wrote:
> do you have links to that minimalistic RISC-V you're talking about?
>
> that might help :)
RISC-V ISA - Chapter 5
RV32E Base Integer Instruction Set
What I meant is to choose register from the top 16 whenever you
need to set a fixed one because of this extension. But it's not
that important at the moment.
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