Re: [Discuss-gnuradio] why quadrature samples?

[Johnathan Corgan]

sam penny wrote:

> I understood the concept before that, but it would've
> taken a lot less in terms of brain ache if I'd had
> that explanation to start from! :)

Likewise.  For some people, complex analysis is "intuitively obvious", 
for others, like me, it requires repetitive, cranio-mechanical insertion 
 (i.e., I need to get it beaten into my head) until it fits.

> > An interesting variation on this is the "Tayloe
> > Detector."
>
> [snip]
> I heard this was actually scarecely different from an
> idea that's been around for a number of decades, but
> who knows...

Probably.  It's a variant of a commutating filter.  Novel enough to get 
patent #6,280,000, but the USPTO standard of novelty has been suspect 
for quite some time now.  In any case, as I mentioned, it wins points 
for the sheer hack value of using a bus multiplexer as an RF mixer.

> I've been thinking of maybe making a TV decoder that
> uses something along these lines, but I'm not sure how
> to get a switcher that will handle the ~500-900MHz
> input or the switching rate (there are 8-bit, two
> chanel 100M samples per second ADCs out there, it'd be
> nice to be able to grab several chanels' worth at once
> using such a device...) the best I've seen has a
> switching rate of around 1000ns per transition
> (guaranteed, more like 6ns typical), which presumably
> wouldn't be enough in the worst case scenario...
> (surely it has to be significantly lower than the
> sampling rate you want...?)

A digital version of this simply becomes an a 4X ADC, where X is the 
bandpass width of the signal.  The ADC samples then become I, Q, -I, -Q, 
and an FPGA or DSP can do the substracts on alternating samples to get 
an I, Q stream at a 2X sample rate each.  The caveat on this is that the 
ADC must have an *input* bandwidth that will cover the actual frequency 
of the signal, not just the bandpass width.

And, you need at least one down conversion to a constant IF, or you'll 
be limited to receiving at the max input bandwidth of your ADC, even if 
you're only sampling at 20 Khz to recover a narrowband FM signal.

Google on "bandpass sampling." (When will 'Google' be listed in the 
dictionary as a verb?)

So, a 10.7 Mhz IF with a 100 Khz +- channel on it (and everything else 
filtered to some low level) would only need an 800 Khz sample clock, but 
the ADC sample-hold buffer must be able to deal with an input at 10.7 
Mhz.  Well within the limits of todays ADCs on the market.

You get out of the FPGA or DSP a sample stream of I, Q at a clock rate 
of 400 Khz. Once you get the I's and Q's, all the funny math can be used 
to get back whatever started out.  This sample sequence at 400 Khz x 
(say) 16 bits = 6.4 Mbps, which you could stream to a PC over USB.

(In case you're wondering, I'm in the design stage on this IF -> IQ over 
USB functional block for a homebrew ham project.)

What needs designing is a generic RF -> IF downconverter that covers DC 
to 3 Ghz, and has programmable bandpass filtering to restrict the 
channel bandwidth to whatever you need before inputting to the 
functional block above.

> incidentally, are there any ways to make use of more
> than two ADCs in super-imaginary numbers or something?
> (I think I worked out that super-imaginary numbers
> disolve into imaginary numbers if you look at them
> hard enough, which would probably mean the answer is
> no, but hey :)

My *brain* would dissolve, not the super-imaginary numbers, if I thought 
about them too hard.

-Johnathan, AE6HO