[Discuss-gnuradio] EETimes: Superfast data converters herald radio revolution

[Paul Hartke]

Superfast data converters herald radio revolution
"Chipsets that cut IF stages open door to basestations defined purely in 
software"
By Ron Wilson, EE Times
September 29, 2003 (2:18 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030929S0060 

San Mateo, Calif. - A chip set from TelASIC Communications that enables 
direct digital conversion of the intermediate frequency heralds a new 
architectural generation for cell-phone infrastructure, the company claims. 
But the shift goes deeper than one company, with technology on the horizon 
that could eradicate IF stages from gigahertz-band radios and usher in an 
age of purely software-defined basestations.

The TelASIC offering comprises the TC1410, a 240-Msample/second, 14-bit 
analog-to-digital converter; the TC4000, a multichannel digital tuner; and 
the TC2400, a 480-Msample/s 14-bit D/A. The mixed-signal chips are 
implemented in IBM Corp.'s 5HP silicon germanium process; the tuner is done 
in 0.13-micron CMOS. Together the parts implement a complete four-carrier 
transceiver module supporting two receive antennas for antenna diversity. 
Hence, the chips support eight receive channels and four transmit channels.

The performance of the chip set rests on breakthrough engineering in the 
mixed-signal devices, said Don Devondorf, chief technology officer at 
TelASIC (El Segundo, Calif.). This in turn rests partly on the company's 
familiarity with IBM's SiGe process and partly on the design team's 20 
years' experience, first within Raytheon and later within TelASIC, in very-
high-speed converter design.

The converter architectures are novel, Devondorf said. "At these speeds a 
lot of things that were second- and third-order problems have to be dealt 
with, and that requires innovations in the architecture. There are reasons 
that not many people poke around this kind of dynamic range."

The A/D converter performance appears exceptional. TelASIC reports a 1-GHz 
input bandwidth for the device, which was optimized to operate in the 
second Nyquist zone. The specs include a 71-dB signal-to-noise ratio (SNR) 
over the Nyquist bandwidth, and sampling jitter of less than 30 
femtoseconds. The latter figure had to be inferred from noise measurements, 
since it is effectively unmeasurable directly. The matching D/A operates at 
480 Msamples/s to provide a 240-MHz output. TelASIC reports a spurious-free 
dynamic range (SFDR) of 80 dBc at 230-MHz output and an SNR of 73 dB at 122 
MHz.

As a point of reference, the fastest high-dynamic-range Nyquist A/D 
converter reported at this year's International Solid-State Circuits 
Conference was a 10-bit, 150-Msample/s device described by Samsung 
Electronics Co. Ltd. (Seoul, South Korea). That device had an SFDR of less 
than 70 dB and was fabricated in 0.18-micron CMOS. The fastest D/A was a 
400-Msample/s, 16-bit converter in 0.25-micron CMOS from Analog Devices 
Inc. (Wilmington, Mass.) that showed a -75-dBc SFDR at 180 MHz.

The multichannel capacity of the TelASIC chip set is the key to the product 
positioning, said Juan Garcia, director of field engineering. The system 
designer can program the tuner chip to pick off four channels of arbitrary 
center frequency and width from within the enormous band provided by the 
A/D converter, thus giving one chip set the ability to span essentially the 
entire spectrum of commercial wireless-telecommunications standards.

It is this flexibility that TelASIC is making the centerpiece of its 
marketing effort. Garcia noted three direct benefits to system operators. 
First, the fact that the chip set eliminates at least one IF stage and gets 
four channels instead of one onto a single card will have a major impact on 
the size and cost of basestations, he said. Second, because the chip set 
can implement channels that meet the specifications of virtually any 
standard, the same hardware can be used to support GSM, US-TDMA, wideband 
CDMA, IS-95 and many other services, vastly reducing costs for both service 
providers and basestation developers.

Finally, further in the future, the chip set paves the way for fully 
software-defined radio (SDR), Garcia said. Because the A/D and D/A 
converters make the entire radio band available to the tuner, and because 
the tuner can be programmed on the fly to reconfigure the channel notches-
more than fast enough to support frequency hopping between bursts, Garcia 
noted-a software-defined baseband architecture could command the chip set 
to provide just the channels it needed to implement a particular radio 
standard on a particular channel at a particular moment.

Blow the doors off 
Where TelASIC is aiming for short-term economies and long-term ventures 
into SDR, another company is quietly preparing to blow the doors off the 
long-term market with an entirely different technology. Hypres Inc. 
(Elmsford, N.Y.), better known as the only commercial foundry for low-
temperature Josephson-junction superconducting circuits, is working with 
U.S. Department of Defense money to develop an A/D converter and digital 
tuner set in superconducting technology with genuinely super performance.

Hypres is aiming not at single-conversion architectures but at direct 
digitization of the RF, said president and chief executive officer Jack 
Rosa. "We are working on a converter with a 400-MHz bandwidth at a center 
frequency of 5 GHz," Rosa said. "The device will have approximately a 100-
dB SFDR with 10- to 12-bit resolution." The work is currently being done in 
3-micron technology, but Rosa said he expects a rapid move to finer 
geometries, with operating frequencies approximately doubling for each 
halving of the minimum critical dimensions.

The project is being funded for use in basestations for the Joint Tactical 
Radio System (JTRS), the military's attempt to pull together the literally 
hundreds of frequencies, bands and protocols currently in use on the 
battlefield into a single SDR. But Rosa observed that if Hypres can solve 
the JTRS problem-and a number of major contractors appear to be betting it 
can-then the problem of a software-defined cellular base-station for 
commercial use would be relatively easy.

"We are in a position to offer twice the range and two to three times the 
capacity in a basestation," Rosa said. The claim is based not only on the 
performance of the A/D but also on the speed of Josephson-junction logic, 
which can clock at 50 GHz in current geometries. That performance makes it 
possible to use digital correlators in place of filters to extract known 
waveforms from a composite signal, substantially increasing the receiver's 
performance.

Of course, the technology's big drawback is that it's not here yet. Rosa 
said the JTRS A/D and correlator essentially exist now and that he expects 
to be able to convert the technology to commercial use in about a year.Work 
may not proceed that fast, however, simply because Rosa believes the 3G 
market won't be ready until 2005.

Another limitation is temperature. Hypres circuits are not high-temperature 
superconductors; they operate at around 5 K. "You have to know how to do 
coolers," Rosa said. "But they can be done. We expect to be able to offer a 
cooler that will require only about 500 cubic inches and perhaps 100 to 150 
watts." That's well within reason for a commercial basestation.

With CMOS devices creeping toward the necessary bandwidth for single-
conversion multichannel architectures, and now with the SiGe TelASIC chip 
set actually available with what appears to be more than adequate 
performance, it seems that baseband architectures are set for a change from 
the receiver-per-channel, narrowband approach that has characterized the 
industry-and limited basestation capacity-so far. And with the promise of 
the Hypres technology quietly moving forward under DOD funding, everything 
could be about to shift again.

Just over the horizon may be that dreamed-of day when the first block 
beyond the low-noise amp is the A/D converter, and from there on, all the 
world is digital.