Re: [Discuss-gnuradio] Help using check_lfsr_32k_s in fsk_rx.py

[Eric Blossom]

On Sun, Nov 13, 2005 at 02:34:55PM -0500, Michael Quinn wrote:
> I am attempting to modify the provided FSK algorithms to use a standardized
> method for determining the transmission error rate.  In the fsk_tx file, I'm
> trying to use the lfsr_32k_source_s instead of a file source as the source
> for the transmitter.  In the fsk_rx file, I'm trying to use check_lfsr_32k_s
> to determine how accurately the data was received.  I have written modules
> that will convert shorts to bytes and bytes to shorts, in order to integrate
> the lfsr output into the existing FSK programs.  I am also able to transmit
> a signal using the lfsr_32k_source_s.  However, on the receive end, I am
> confused about how to use and where to call the ntotal, nright, and
> runlength functions to determine how accurately the data was received.  I
> need these functions to run after all of the data being transmitted has been
> received.  I was trying to use benchmark_usb.py as an example.  However, I
> am confused about what exactly the FPGA_MODE_LOOPBACK is.  Also, in the
> benchmark_usb.py implementation, ntotal, nright, and runlength are called
> after the fg.run command.  In the fsk_rx.py, graphs and therefore fg.run are
> not used, and I don't understand how to perform a similar implementation of
> this in the fsk_rx.py program.  


First off, we've got new gmsk code that you're going to like much
better than the existing fsk and/or gmsk implementation.

I'll post a note to the list later today when it's all in.

> My questions are:
> 
> 1.  What is the USRP digital loop back mode?

The USRP support two test modes, mostly useful for diagnosing USB
interfacing problems.

The first is FPGA_MODE_COUNTING.  This allows us to test the inbound
(USRP->host) path.  In this mode, the USRP generates a repeating ramp
of 16-bit samples.  0, 1, 2, 3, ..., 65535, 0, 1, 2...

The second test mode is FPGA_MODE_LOOPBACK.  In this case, all data
received by the USRP is looped back to the receive path.  The loop-
back occurs just after the FIFO's and before any signal processing
code in the FPGA.

> 2.  Using the check_lfsr_32k_s function in the fsk_rx.py program, how can I
> call ntotal, nright, and runlength only after receiving all of the
> transmitted data instead of immediately after the blocks are connected? 

Stay tuned until later today.  I think our new examples will be easier
for you to work with.  They accept and deliver variable length packets
of data from the python side.  You'll be able to perform your bit
error rate calculations in python on each packet.

Eric