Re: [Discuss-gnuradio] Re: USRP Tx Question

[Elaine Garbarine]

On 4/15/06 4:32 PM, "Eric Blossom" <address@hidden> wrote:

> On Fri, Apr 14, 2006 at 11:51:36PM -0400, Elaine Garbarine wrote:
>> On 4/14/06 6:58 PM, "Eric Blossom" <address@hidden> wrote:
>>> On Fri, Apr 14, 2006 at 12:18:47PM -0400, Elaine Garbarine wrote:
>> 
>>> On problem that will need some thinking about is that we're using the
>>> DUC in the AD9862 and we don't have a way to reset it's phase
>>> accumulator short of cycling power.  If you need phase coherence on
>>> Tx, you may have to implement the DUC in the FPGA.  I'm not absolutely
>>> certain about this, but that's my suspicion.  I suggest spending some
>>> time with the AD9862 data sheet.
>>> 
>> 
>> This is actually exactly what I was afraid of. I'll spend some time with the
>> data sheet and see what I can find out about the phase accumulator.  Do you
>> know of a way to completely disable the DUC in the AD9862?  For my
>> application all of our communications will be occurring at baseband (for the
>> time being) so I don't necessarily need the DUC.
> 
> Yes.  As long as you *never* set the frequency to anything other than
> zero after powerup, the AD9862 DUC is effectively out of the the loop,
> and I'm pretty sure that its phase register is zero.  The library
> startup code sets it only to zero.
> 
>> Regards,
>> Elaine
> 
> Eric

For the time being just never setting the frequency to anything other than 0
will do so I'm going to do that in order to bypass the DUC in the AD9862.  I
just want to see if I can get some sort of transmit sync working before I
add a DUC back into the picture (and I'll definitely need to look into
implementing the DUC in the FPGA instead of using the one in the AD9862).

As for the transmit sync my thought was to have the "master" USRP send a
flag of some sort (probably by setting one of the daughterboard header pins
high) when it was about to transmit.  I would then have the slave USRP
transmit upon seeing this flag on one of it's daughterboard pins.  I'm
thinking the best place to put these code modifications would be in
master_control unless anyone has a better suggestion.

I do have one question about altering and recompiling the FPGA code.  Once I
use the Quartus software to recompile the code do I just copy this new code
into the correct directories in my Linux box (running GNU Radio) or is there
something else I need to do to get the new code onto the FPGA?

Regards,
Elaine