Re: [Discuss-gnuradio] The coming deluge of CPU cycles

[Eric Blossom]

On Fri, Jul 28, 2006 at 10:01:11AM +0930, Daniel O'Connor wrote:
> On Friday 28 July 2006 01:33, Eric Blossom wrote:
> > > A 9030 is target only, you'd need a 9054, 9056, 9060 or 9080 otherwise
> > > the performance would not be very great.
> >
> > Good point.  I've written drivers using the 9080 before it was pretty
> > easy to use.  The scatter/gather stuff worked fine for me, at least
> > from the point of view of the host side.
> 
> Yeah, I mean to say that you COULD use it, but it would need more host 
> intervention and/or a reasonable amount of on card buffering.
> 
> You can't (as far as I can see) say to the SG engine that it's reading from a 
> FIFO and it should treat the data as precious. Also there is no input to the 
> PLX chip to allow you to gate reads (ie a data available pin).
> 
> So if you wanted to use it you'd have to set up some local memory and then 
> copy data into that (from the FPGA) and then signal the host when a "page" is 
> done so it can program the PLX chip. Means you get an interrupt every page 
> which seems inefficient to me.

That's why you want to use one one of the bus mastering PLX parts.  
No host intervention in the tranfers after setting them up.  You can
build a big S/G DMA chain, and only get an interrupt at the end, or
every N pages, or whatever.

Eric