Re: [Discuss-gnuradio] USRP and RFX2400 block diagrams

[Matt Ettus]

> > Here are a couple of tweaks:
> >
> > The digital down-conversion should show a single complex multiplier
> > instead of two real multipliers.
> >    
>
> Thanks. I'll make the change.  A complex multiplier is just a more
> efficient digital version of what I've drawn, right?
>  

Not exactly.  What you show in the diagram is that Iout is a function of 
only Iin, and the same for Q.  In reality Iout is a function of both Iin 
AND Qin.  The same goes for Qout.

Think of it as a complex multiply --

(a + bi) * (c + di) = (ac-bd) + (ad+bc)i

There are actually 4 multiplications happening.

We implement this all in a CORDIC structure, which is much more area 
efficient than using 4 multiplies.  In fact, it is smaller than a single 
multiply.

> > Same comment on the digital up-conversion.  We've got "Block D"
> > enabled in the AD9862, thus it's functioning as a complex multiplier.
> >    
>
> Okay. Out of curiosity, is "Block B" enabled too?
>  
Yes.  This is actally one of the major differences between the 
upconverter path and the downconverter path--

In the downconverter (in the FPGA), we run the complex multiply at the 
full sample rate.

In the upconverter (in the AD9862, from Figure 3 in the 9862 docs), they 
split the complex multiply into 2 parts -- coarse and fine.  The fine 
part (block D) runs at 1/4 of the sample rate.  This means that it can 
only move the freqency 1/4th as far.  The block is then followed by the 
4x interpolation (Block C), and then the coarse modulation, Block B.  
Block B only moves the signal +/- fs/4 or fs/8.

Matt