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[Discuss-gnuradio] Re: A low-budget SDR - Was: PCIe know-how?


From: ceriel
Subject: [Discuss-gnuradio] Re: A low-budget SDR - Was: PCIe know-how?
Date: Mon, 5 Mar 2007 22:31:01 +0200

On 3/5/07, Brian Padalino <address@hidden> wrote:
On 3/5/07, address@hidden <address@hidden> wrote:
> Yeah, I thought about PoE too, but I got the impression implementation
> isn't that common. Or is it common? If it is, we'd once again save
> some complexity and therefore money by using it.

I don't think it's that common, but you can buy what are called
midspans which are in-line with ethernet cables and supply the power.
Therefore, if the host to the peripheral doesn't have PoE available,
the midspan gets put in there and supplies the power.

One that supports gigabit ethernet can be found here:

    http://www.powerdsine.com/Products/Midspan/PD_3001.asp

As for complexity - it doesn't necessarily get simpler because of
that.  You need to get a chip that will handle all the arbitration of
doing PoE and do the DC/DC conversion for you.  TI has one, and is
cheap ($1.50 I believe) - but it still adds to the BOM and to your PCB
size.

(Found the Reply to All button!)

A fellow calling himself Kim posted this link in a comment to the blog:
http://tinyurl.com/3dhmb6

Seems there's an option for adjustable voltage on some, but I'm not
sure how useful that is unless we manage getting all components using
the same voltage. I think it's best to defer judgment on the issue for
now.

I suspect the best design method would be to look at the most
expensive issues first, make those cheaper and then design the rest
around that. The FPGA, ADC and PCB seem to be the most expensive parts
right now. I can't say anything about the PCB yet, but the
dimensioning of the ADC and FPGA would be an issue of what we can get
away with and still have an SDR. The dimensioning of the FPGA depends
on the ADC, so the ADC should be the first issue to be dealt with.

A high SINAD and SNR value for the ADC seems to be important at any
rate, regardless of bit-count, but those values still seem to be
proportional to how many bits of accuracy it has. Low jitter is
apparently also important. The LTC1742 seems attractive in that regard
and the price isn't that terrible either, but it's a 14bit device.
The ADC12C065 and ADC12DS065 are 12 bits, but I don't know National's
price on those. They seem to support undersampling up to 1GHz. If we
could use that, we'd have a pretty awesome radio.
Analog Devices' AD9235 is really cheap and seems to support
undersampling to 500MHz, which is pretty cool too. More than I need at
any rate.

There are of course other manufacturers to consider, but I feel this
is a good start at the very least. Gives an idea what we're dealing
with.


I think the step after deciding on the ADC  would be to dimension the
FPGA by deciding what code it needs to run. It will have to deal with
a bit of Ethernet, and stuffing all the data from the ADC into the
frames. Of course that's not all, but right now it seems that will be
its most taxing task, so it should be spec-ed to be able to deal with
that. I have no idea what those specs are. Guess I'll have to learn
Verilog before I can start guesstimating.

Better post this in the blog too...

Thanks for reading! =)

--
Nos




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