[Discuss-gnuradio] Re: [Commit-gnuradio] r6047 - gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python

[Eric Blossom]

On Sat, Jul 21, 2007 at 03:09:15PM -0600, address@hidden wrote:
> Author: jcorgan
> Date: 2007-07-21 15:09:14 -0600 (Sat, 21 Jul 2007)
> New Revision: 6047
> 
> Modified:
>    
> gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python/radar_mono.py
>    
> gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python/usrp_radar_mono.py
> Log:
> Add Python support for using either side of USRP.
> 
> Modified: 
> gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python/radar_mono.py
> ===================================================================
> --- 
> gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python/radar_mono.py
>  2007-07-21 20:31:09 UTC (rev 6046)
> +++ 
> gnuradio/branches/developers/jcorgan/radar/gr-radar-mono/src/python/radar_mono.py
>  2007-07-21 21:09:14 UTC (rev 6047)
> @@ -30,10 +30,12 @@
>  #-----------------------------------------------------------------------
>  FR_RADAR_MODE           = usrp.FR_USER_0    # Operational mode
>  bmFR_RADAR_MODE_RESET   = 1 << 0     # bit 0: active high reset
> -#bmFR_RADAR_MODE_LP     = 1 << 1     # bit 1: enable digital loopback
> -#bmFR_RADAR_MODE_DR     = 1 << 2     # bit 2: enable on-board deramping
> -#bmFR_RADAR_MODE_MD     = 1 << 3     # bit 3: enable echo metadata
> -#bmFR_RADAR_MODE_CHIRPS = 3 << 4     # bit 4,5: number of chirp center 
> frequencies
> +bmFR_RADAR_TXSIDE       = 1 << 1        # bit 1: use TX side A or B
> +bmFR_RADAR_RXSIDE       = 1 << 2        # bit 2: use RX side A or B
> +#bmFR_RADAR_MODE_LP      = 1 << 3    # bit 3: enable digital loopback
> +#bmFR_RADAR_MODE_DR      = 1 << 4    # bit 4: enable on-board deramping
> +#bmFR_RADAR_MODE_MD      = 1 << 5    # bit 5: enable echo metadata
> +#bmFR_RADAR_MODE_CHIRPS  = 3 << 6    # bit 6,7: number of chirp center 
> frequencies
>  
>  FR_RADAR_TON    = usrp.FR_USER_1     # 16-bit transmitter on time in clocks
>  FR_RADAR_TSW    = usrp.FR_USER_2     # 16-bit transmitter switch time in 
> clocks
> @@ -62,12 +64,15 @@
>  # FPGA registers.
>  #-----------------------------------------------------------------------
>  class radar_tx:
> -    def __init__(self, verbose=False, debug=False):
> +    def __init__(self, side='A', verbose=False, debug=False):
>       self._verbose = verbose
>       self._debug = debug
>  
>          self._u = usrp.sink_s(fpga_filename='usrp_radar_mono.rbf')
> -        self._subdev_spec = (0,0); # FPGA code only implements side A
> +     if side == 'B':
> +         self._subdev_spec = (1, 0)
> +     else:
> +         self._subdev_spec = (0, 0)


This test for side == 'B' is seriously fragile.
I'd explicitly check for something like this:

  if side in ('a', 'A'):
    ...
  elif side in ('b', 'B'):
    ...
  else
    raise ValueError, side

Eric
>  
> +    def set_boards(self, tx_side, rx_side):
> +     if tx_side == 'B':
> +         self._mode |= bmFR_RADAR_TXSIDE
> +     else:
> +         self._mode &= ~bmFR_RADAR_TXSIDE
> +     if rx_side == 'B':
> +         self._mode |= bmFR_RADAR_RXSIDE
> +     else:
> +         self._mode &= ~bmFR_RADAR_RXSIDE
> +     self._write_mode()
> +     
>      """

Same problem here...

Eric