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Re: [Discuss-gnuradio] Serial io questions
From: |
Brian Padalino |
Subject: |
Re: [Discuss-gnuradio] Serial io questions |
Date: |
Thu, 14 Aug 2008 15:14:13 -0400 |
On Thu, Aug 14, 2008 at 3:01 PM, Sebastiaan Heunis <address@hidden> wrote:
> Hi
>
> If have a few questions regarding the serial interface between the FX2
> and the FPGA and the writing of registers. I would just like to know
> how serial_strobe, serial_data and serial_addr signals work? I know
> that serial_io.v handles this and generates a strobe to tell the
> modules that something was written on the serial interface.
>
> I would just like to know how these signals work. When does
> serial_strobe go up and how is serial_data and serial_addr stored?
> For now I want to write a testbench for phase_acc.v. I would like to
> know how the serial input to this module should look in order to input
> the address and a frequency value into this module and get it to
> output freq. I want to then see what the phase output that goes to
> cordic.v looks like in order to simulate cordic.v.
>
> setting_reg #(FREQADDR)
> sr_rxfreq0(.clock(clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(freq));
At the top is just a SPI interface. Reference the timing here:
http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
The serial interface is decoded using serial_io.v found here:
http://gnuradio.org/trac/browser/gnuradio/trunk/usrp/fpga/sdr_lib/serial_io.v
This decodes the address and data that is written to the register and
strobes the valid signal to all setting registers. Reading
setting_reg.v here:
http://gnuradio.org/trac/browser/gnuradio/trunk/usrp/fpga/sdr_lib/setting_reg.v
If the address of the module matches the address that was written to
serial_io.v, this will latch the data and output a single pulse
'changed' to signal the data has changed.
To simulate - just set the address and data values appropriately,
strobe, and go. The setting_reg will latch the values in and
everything should work properly.
Hope this helps.
Brian