Re: [Discuss-gnuradio] Some USRP2 Questions

[Matt Ettus]

Firas A. wrote:
> Hi Matt,
>
> I have some questions (prepared from a while before you have been submitted
> USRP2 schematics so excuse me if some of them can be answered from your
> schematics).
>
>
> 1) How USRP2 boots? and how the FPGA firmware is loaded?
>   

The CPLD (a Xilinx XC9572) reads the 1st megabyte from the SD card and 
writes to the FPGA config pins in slave-serial mode.  One the FPGA is 
configured, it requests the firmware for the aeMB processor from the SD 
card.  After that the CPLD is switched over to passthru mode and the 
FPGA has direct access to the SD card under program control.
> 2) What is USRP2 ADC chip? Is there an auxiliary ADC?
>   

The main ADC is the LTC2284, used at 100 MS/s.  There is an auxiliary 
ADC, the AD7922, for each dboard connector.

> 3) What is USRP2 DAC chip? Is there an auxiliary DAC?
>   

AD9777.  The auxiliary DACs are AD5623

> 4) Is there auxiliary Digital I/O?
>   

The same 16 digital IOs, SPI, and I2C to each daughterboard connector.  
The whole interface to the daughterboards is the same as the USRP1, 
except instead of it being implemented all in the AD9862, it is done 
with the following set:

   LTC2284
   AD9777
   2x AD5623
   2x AD7922

> 5) How USRP2 DDC is implemented ? How many CIC stages it contains?
>   

Very similar to the USRP1, with a 4 stage CIC

> 6) How USRP2 DUC is implemented ? How many CIC stages it contains?
>   

Again very similar, with a 4 stage CIC

> 7) If DDC contains HBF, How many taps it has?
>   

The DDC and DUC each contain 2 halfband filters.  The high rate one has 
7 taps and the low rate one has 31 taps.

> 8) What is USRP2 minimum and maximum decimation values? is odd decimation
> possible?
>   

Minimum interp and decim are 4.  Maximum is 512.

If you use odd decimation or interpolation, you just get CIC with no 
halfbands.  If you use an even rate but not a multiple of 4, you just 
get one halfband (the low rate one).  If your rate is a multiple of 4, 
you use both halfbands.

> 9) What is USRP2 minimum and maximum interpolation values? is odd
> interpolation possible?
>
>   

same as decimation

> 10)What is USRP2 default IP address and subnet mask?
>   

The standard USRP2 FPGA image does not use IP, just raw ethernet.

> 11) Does USRP2 respond to network ping command? 
>   

No, but we have our own, find_usrps

> 12) What is USRP2 reference clock stability?
>   

About 20 ppm unless you lock to an external reference.


> 13) With Basic TX board, USRP1 can generate maximum of 44 MHz frequency,
> What USRP2 is capable of ?
>   

U

> 14) What is USRP2 overrun message?
>
> 15) What is USRP2 underrun message?
>
> 16) What are the most important (hot) trunk USRP2 code that we need to check
> to understand USRP2 architecture, configuration and operation?
>
> 17) How much USRP2 FPGA resources does the currently FPGA firmware needs?  
>
> Best Regards,
>
> Firas
>
>
>