discuss-gnuradio
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Discuss-gnuradio] USRP FPGA 8-bit Data Ordering


From: Eric Blossom
Subject: Re: [Discuss-gnuradio] USRP FPGA 8-bit Data Ordering
Date: Wed, 28 Jan 2009 13:38:00 -0800
User-agent: Mutt/1.5.18 (2008-05-17)

On Wed, Jan 28, 2009 at 02:31:34PM -0500, Paul Creekmore wrote:
>
> Eric Blossom wrote:
>> On Wed, Jan 21, 2009 at 09:50:41PM -0500, Paul Creekmore wrote:
>>   
>>> Eric Blossom wrote:
>>>     
>>>> On Wed, Jan 21, 2009 at 05:47:19PM -0500, Paul Creekmore wrote:
>>>>   
>>>>
>>>> Thanks for answering your own question :-)
>>>>
>>>> The USRP1 is little endian.  My not-fully-considered thought is that it
>>>> ought to go like this (everything packed into a 32-bit word):
>>>>
>>>> 16 bit I & Q (same as today):
>>>>
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>   |              Q0               |              I0               |
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>
>>>> 8 bit I & Q (different from today: see usrp_source_c.cc):
>>>>
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>   |      Q1       |      I1       |      Q0       |       I0      |
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>
>>>> 4 bit I & Q:
>>>>
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>   |  Q3   |  I3   |   Q2  |  I2   |   Q1  |   I1  |  Q0   |  I0   |
>>>>   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
>>>>
>>>> etc...
>>>>
>>>> What are you thoughts about this?
>>>>
>>>> Eric
>>>>         
>>> First off, current USRP words are 16-bit, are they not?  The 
>>> rx_buffer  module in the FPGA code stores data in a 16-bit FIFO.  Are 
>>> you  suggesting changing this, or is the 32-bit width above merely   
>>> illustrative?
>>>     
>>
>> illustrative.
>>
>>   
>>> Either way, I agree with your sample ordering above.   It's 
>>> consistent for all sample widths, and it should make host-side code   
>>> straight-forward.
>>>     
>>
>> OK, good.  "Make it so" :-)
>>
>> Eric
>> g
>>   
> And who should I notify (this list?) when this is ready for peer review?  
> I'm doing my own validation right now, which is going well.

This list is a good place.  Just point us to your develeloper branch
and ask us to build and test.  A couple of examples of usage would
probably be helpful.  In my experience, if I want somebody to test
something, I need to make it _easy_ for them to test it.

Thanks for all your efforts!
Eric




reply via email to

[Prev in Thread] Current Thread [Next in Thread]